Technical Program
|
| |
|
CHIP IN THE PAMPA at a Glance
SBCCI2008, SBMICRO2008 and SFORUM2008 |
|
|
|
|
|
|
|
SBCCI'08 Detailed Program
Tuesday, September 2nd
| 8:20 - 9:00 |
Technical Program Opening (Room: Rubi)
Message from the General Chair
Marcelo Lubaszewski (UFRGS, Brazil)
Message from the Program Chairs
SBCCI2008
Michel Renovell (LIRMM, France), Rajesh Gupta (UCSD, USA)
SBMicro2008
Jacobus Swart (UNICAMP, Brazil), Siegfried Selberherr (TU-Wien, Austria)
SForum2008
Fernando Rangel (UFRN, Brazil), Salvador Gimenez (FEI, Brazil)
IEEE CASS Awards
Maciej Ogorzalek (IEEE CASS President)
|
| 9:00 - 10:00 |
Keynote Address (Room: Rubi)
System-level Design Technologies for Heterogeneous Distributed Systems
Giovani De Micheli (École Polytechnique Fédérale de Lausanne, Switzerland)
Session Chair: Michel Renovell (LIRMM, France)
|
| 10:00 - 10:30 |
Coffee-Break (Room: Safira)
Lauching of the Latin-American Student IC Design Contest
Organized by CEITEC
Supported by SBMicro, X-FAB and MOSIS
|
| 10:00 - 12:30 |
SForum Session 1 - Poster session (Room Safira)
VHDL Modelling of the MAC-1 architecture
Giuliano Vilela - UFRN, Brazil
Modular Multiplication Algorithm For PKC
Diego Viot, Rodolfo Aurélio Helano Castro and Jardel Silveira
LESC, Brazil
A Reconfigurable MC-DS-CDMA Digital Transmitter For SDR Mobile Terminals
Oscar Igor Robles Palacios, Jorge Vicente De La Cruz Marín and Roddy Alexander Romero Antayhua
PUC Perú, Peru
Design And Implementation of a Dual Core MIPS32 Processor
Thiago Nunes Coelho Cardoso, Celina Gomes do Val, José Augusto Nacif, Antônio Otávio Fernandes and Claudionor Nunes Coelho Jr.
DCC-UFMG, Brazil
Architectural Templates for the 4X4 Transforms of the H.264/AVC Standard Targeting the Intra Prediction Coder
Felipe Sampaio, Robson Dornelles, Daniel Palomino, Guilherme Corrêa, Diego Noble and Luciano Agostini
UFPel, Brazil
Incremental Hardware Development from Modular Mixed C-VHDL Simulation
Márlon Allan Lorencetti, Wagston Tassoni Staehler and Altamiro Amadeu Susin
UFRGS, ULBRA, Brazils
CROSSBUS: A Programming Model Aware NOC
Gabriel Oshiro Zardo and Dominique Houzet
UFRGS, Brazil - INPG, FRANCE
A Core for Network-on-Chip Latency-Based Performance Analysis
Miklécio Costa and Ivan Silva
UFRN, Brazil
A Reconfigurable OFDM Modulator for a Software Defined Radio Platform
Bruno Silva
MEES/DEE/CT-UFRN, Brazil
Aquarius II - A platform for dynamic reconfigurable systems prototyping
Victor Medeiros and Manoel Lima
CIn-UFPE, Brazil
|
| 12:30 -14:00 |
Break for Lunch
|
| 14:00 -18:30 |
SForum Session 2 - Poster session (Room Safira)
Temperature Influence on SOI CMOS Devices
Marcelo Sandri, Márcio Martino, Wilhelmus Van Noije and João Martino
LSI-USP, Brazil
Simulation and Parameter Extracition of CMOS Devices
Ricardo Wada, Hugo Ricardo Jimenez Grados and José Alexandre Diniz
FEEC, CCS - UNICAMP, Brazil
Device Characterization of an IBM 0.18µm Analog Test Chip
Giovano da Rosa Camaratta, Eduardo Conrad Jr, Luiz Fernando Ferreira, Fernando Paixão Cortes and Sergio Bampi
UFRGS, Brazil
Graph-Based solution for dual transistor networks generation
Vinicius Callegaro, Leomar S. da Rosa Jr., André I. Reis and Renato P. Ribas
UFRGS, Nangate Inc., Brazil
A Tree-Based Transistor Gate Matching Solution For Efficient Layout Implementation
Diogo da Silva, Fábio Pereira, Leomar da Rosa Jr., André Reis and Renato Ribas
UFRGS, Nangate Inc., Brazil
3D-Numerical Simulation of the SOI-FINFET for Analog Circuit Design
Luiz Fernando Ferreira and Sergio Bampi
UFRGS, Brazil
MOS Devices Technology: Fabrication and Characterization
Jeferson Silva and Victor Sonnenberg
FATEC/SP, Brazil
Automatic Generation of Wagon Wheel Shape Pattern for 2D Anisotropic Etching Simulation
Rafael Hansen da Silva, Carlos Eduardo Klock, André Inacio Reis and Renato Perez Ribas
UFRGS, Nangate Inc., Brazil
A Simple Model to Estimate Intrinsic Power Consumption in CMOS Logic Gates
Erasmo J. D. Chiappetta Filho, Paulo F. Butzen, Leomar S. da Rosa Jr., André I. Reis and Renato P. Ribas
UFRGS, Nangate Inc., Brazil
High Frequency Capacitance Versus Voltage Curves Analysis in PI-GATE SOI MOSFET Structures
Vinicius Zanchin, Michele Rodrigues and João Antonio Martino
USP, Brazil
|
| 16:00 - 16:30 |
Coffee-break (Room: Safira)
|
| 16:30 - 18:30 |
Political Panel (Room: Rubi, in Portuguese)
Política de C&T para Inovação e Competitividade em TIC
Organizador: Altamiro Susin (SBMicro, Brazil)
Moderador: Sérgio Bampi (CECCI-SBC, Brazil)
Painelistas:
Sérgio Rezende, Exmo. Ministro de Ciência eTecnologia
Jacobus Swart, Institutos do MCT
Agências Governamentais: CNPq, FINEP e BNDES
Assoc. Bras. das Indústrias de Eletro-Eletrônica
Gisele Roesems, Com. de Nanoeletrônica - CEE
|
| 18:30 - 19:30 |
Official Opening (in Portuguese)
Official Opening (Room: Rubi, in Portuguese)
Sergio Rezende, Exmo. Ministro de Ciência eTecnologia
Secretaria de C&T do Estado do RGS
Univ. Fed. do Rio Grande do Sul
Agências Governamentais: CNPq, FINEP e CAPES
Marcelo Lubaszewski, Coordenação do Evento
Altamiro Susin, SBMicro
Sérgio Bampi, CECCI-SBC
Maciej Ogorzalek, IEEE CASS
Entrega do Prêmio Padre Landell de Moura
Sergio Rezende, Exmo. Ministro de Ciência eTecnologia
|
| 19:30 -21:30 |
Welcome Cocktail (Room: Esmeralda)
SBCCI 25th Anniversary Celebration
|
|
|
|
Wednesday, September 3rd
| 10:00 - 10:30 |
SForum Session 3 - Poster session (Room Safira)
Analog Integrated Circuits Design by Means of Genetic Algorithms
Thiago Turcato do Rego, Salvador Pinillos Gimenez and Carlos Eduardo Thomaz
FEI, Brazil
Set-Tolerant Fast Adders Implemented in FPGAs
Guilherme Corrêa, Helen Franck, Eduardo Mesquita, Luciano Agostini and José Luís Güntzel
UFPel, UFSC, Brazil
Radiation Effects on Flip-Flop SOI CMOS
Márcio Martino, Marcelo Sandri, Paula Agopian, Milene Galeti, Wilhelmus Van Noije and João Martino
USP, Brazil
Full Adder Design using Quantum DOT Cellular Automata Logical Gates
Manoel Florêncio de Queiroz Neto and Fernando Rangel de Sousa
UFRN, Brazil
Analysis of MOSFETS Associations Influence in Post-Layout Simulations
João Paulo Marinho Dantas and Fernando Rangel de Sousa
UFRN, Brazil
Design of Low-Voltage Operational Amplifiers with CMOS Technology
Marco Nakashima and Nobuo Oki
UNESP - Ilha Solteira, Brazil
RAMAGT - A Tool for Automatic Generation of Radix-2m Array Multipliers
Diego Jaccottet, Leandro Pieper, Eduardo Costa and Sérgio Almeida
UCPel, Brazil
Design Parameters and their Impacts on a CMOS APS Sensor Response
Pedro Retes, Joao Melo, Henrique Casotti, Frederico Matos and Davies Monteiro
UFMG, Brazil
Design of a CMOS Temperature Sensor using the ACM Model
Jefferson Dantas and Fernando Sousa
UFRN, Brazil
Design of a CMOS operational amplifier
Abrahão Fontes, Leandro Mota, Carlyle Júnior and Fernando Sousa
UFRN, Brazil
|
| 12:30 -14:00 |
Break for Lunch
|
| 14:00 -16:30 |
SForum Session 4 Poster session (Room Safira)
Design and Test of a DDR SDRAM Interface for FPGA Systems
Alexsandro Cristovão Bonatto, André Borin Soares and Altamiro Amadeu Susin
UFRGS, Brazil
ORBDD Logic Synthesis: Improving Timing Through Fan Out Managing
Cristina Meinhardt, Reginaldo Tavares and Ricardo Reis
UFRGS, UERGS, Brazil
A Global Critical Path Aware Placement Technique
Felipe Pinto, Lucas Cavalheiro and Ricardo Reis
UFRGS, Brazil
Single-Electron Content-Address Memory Circuit
Bianca Alencar and Janaina Guimarães
UnB, Brazil
Efficiency of standard cell libraries composition
Pedro Egidio Menegaz Paganela, Eduardo Antonio Achutti Canabarro, André Reis and Renato Ribas
UFRGS, Nangate Inc., Brazil
An Extension of the PETSc for Reconfigurable Computer Systems: BLAS on RASC
João Cleber Libório and Manoel Lima
UFPE, Brazil
Modeling the Impact of NBTI on the Reliability of Arithmetic Circuits
Vinícius Camargo, Maurício da Silva, Lucas Brusamarello, Gilson Wirth and Peter Gloesekoetter
UFRGS, Brazil
- University of Muenster, Germany
Modeling Set Pulse Broadening in Integrated Circuits
Ivandro Ribeiro, Gilson Wirth and Fernanda Lima Kastensmidt
UFRGS, Brazil
Partitioning in the Parrot Flow for Physical Synthesis
Samuel Pagliarini, Marcelo Johann and Ricardo Reis
UFRGS, Brazil
|
| 16:00 - 16:30 |
Coffee-break (Room: Safira)
|
| 16:30 - 18:30 |
Technical Panel (Room: Rubi)
Challenges of the Nanoscale Era
Organizer: Ricardo Jacobi (UnB, Brazil)
Moderator: Sergio Bampi (UFRGS, Brazil)
Panelists:
Rajesh Gupta (UCSD, USA)
Siegfried Selberherr (TU-Wien, Austria)
Andreas Kuehlmann (Cadence Berkeley Labs, USA)
Michel Renovell (LIRMM, France)
|
| 18:30 - 20:30 |
Fringe Meeting (Room: Esmeralda, in Portuguese)
Assembléia Geral da Sociedade Brasileira de Microeletrônica
|
|
|
|
Thursday, September 4th
| 10:00 - 10:30 |
Coffee-Break (Romm: Safira)
|
| 10:00 - 12:30 |
SForum Session 5 - Poster session (Room Safira)
Designing Test Structures and Analyzing Their Impact in NoC Interconnection Functional Testing
Marcos Hervé, Marcelo Lubaszeski, Erika Cota and Fernanda Kastensmidt
UFRGS, Brazil
Distortion Analysis of a CMOS Balanced Transconductor Valid for All Regions of Operation
Antonio Silva and Fernado Sousa
UFRN, Brazil
Eye Movement Controlled Mouse Pointer
Ernano Junior and Fernando Sousa
UFRN, Brazil
Using Bulk Built-In Current Sensors and Recomputing Techniques to Mitigate Transient Faults in Microprocessors
Franco Leite, Tiago Balen, Marcos Hervé, Marcelo Lubaszewski and Gilson Wirth
UFRGS, Brazil
Ring voltage controlled oscillators for an rf transceiver
Heider Marcôni Guedes Madureira and José Edil Guimarães de Medeiros
UnB, Brazil
Behavioral Modeling of Neuronal Action Potentials using Verilog-AMS
Leonardo Enzo Silva and Fernando Sousa
UFRN, Brazil
Study of Transconductance for Doped Triple-Gate Transistors
Rudolf Bühler and Renato Giacomini
FEI, USP, Brazil
Design and Evaluation of a NMOS 90 NM 3D Device
Thiago Assis, Gilson Wirth, Fernanda Kastensmidt and Ricardo Reis
UFRGS, Brazil
Fast Algorithm to Leakage Power Reduction by Input Vector Control
Dionatan Moura, Paulo Butzen, Leomar da Rosa Jr., Andre Reis and Renato Ribas
UFRGS, Nangate, Brazil
|
| 12:30 - 14:00 |
Break for Lunch
|
| 14:00 -16:30 |
SForum Session 6 - Poster session(Room Safira)
Automatic Synthesis of Analog Basic Blocks Using a Simulated-Based Algorithm and Compact MOSFET Model
Lucas Compassi Severo and Alessandro Gonçalves Girardi
UNIPAMPA, Brazil
A Didactic Chip for Use in Introductory Microelectronics Courses
Francisco Júnior and Fernando Sousa
UFRN, Brazil
A Numerical Environment for Photoconductor Modeling
Thiago Barçante Teixeira, Tiago de Oliveira Rocha and Davies William de Lima Monteiro
UFMG, Brazil
Study of High Temperature Influence on Capacitor High Frequency C-V Curves Behavior
Ana Paula Borges Ziliotto and Marcello Bellodi
FEI, Brazil
Automated Test Bench for Operational Amplifiers
Leandro Mota, Abrahão Fontes and Fernando Sousa
UFRN, Brazil
An Interface for NOC-Based Virtual Platforms Simulation
Camila Oliveira, Silvio Fernandes, Bruno Oliveira and Ivan Silva
UFRN, Brazil
SiPrEMo - A simulator of electronic properties of molecules
Bruno Borba and Carlo Cunha
NCPq/UFSC, UFSC, Brasil
A Robotic Platform Based in FPGA for Educational Applications
Felipe Sanches Gurgel and Marcos Banheti Rabello Vallim
Federal University of Technology - Paraná - Campus Cornélio Procópio, Brazil
Implementation of a Basic Microcontroller for Teaching Embedded Systems Design
Maicon Pereira and Cesar Zeferino
Univali, Brazil
Improved Method to Extract the Parasitic S/D Resistance in Multiple-Gate FET's
Talitha Nicoletti, Salvador Gimenez and João Martino
USP, FEI, Brazil
|
| 18:35 - 20:30 |
Fringe Meeting (Room: Rubi, in Portuguese)
Encontro com o Comitê Assessor de Microeletrônica do CNPq
|
|
|
|
|
|
|
|
|
|
|
|
|