Logic Circuit Synthesis Lab
LogiCS Labs provide research activities in computing models and algorithms related to digital integrated circuit design flow optimization in terms of performance, power consumption, silicon area and noise immunity, at different design levels: logical (technology mapping), electrical (transistor network) and physical (layout). ASIC design is also included in the team tasks as a way to verify and validate the proposed CAD tools and methods. It is registered as a Research Group at CNPq, with the name "Ferramentas Computacionais para Projeto de Circuitos e Sistemas Integrados" (in Portuguese). It also aggregates the activities of the Nangate-UFRGS Research Lab, in the scope of this R&D agreement.
CNPq Research Group - CAD Tools for Digital Integrated Circuits
LogiCS Labs is registred at National Council for Scientific and Technological Development (CNPq) refered as the research group named Computer-Aided Design (CAD) Tools for Integrated Circuit (in Portuguese, "Ferramentas Computacionais para Projeto de Circuitos e Sistemas Integrados"). CNPq is a governmental agency linked to the Ministry of Science and Technology (MCT), dedicated to the promotion of scientific and technological research and preparation of human resources for research and innovation activities in Brazil.