Since the breakdown of Dennard scaling, and as Moore’s Law approaches its end, chip designers have been challenged with finding new efficient ways to increase processor performance under very strict power and area constraints. Increases in single-threaded performance faced a significant slowdown, as maximum clock frequency remained constant to limit energy consumption. While designs have been previously constrained by these three metrics (performance, area, and energy), many modern applications present a natural tolerance to some degree of imprecision [*].
In this context, approximate computing represents a new paradigm that introduces quality as a new metric in the design space, allowing designers to exchange precision in the results for better tradeoffs between performance, area, and energy [*]. By considering the wide range of known applications in which the results can tolerate a small error, such as computer vision, multimedia processing, data mining, and machine learning, it is possible to exchange quality for up to 2-3x improvements in these three metrics [*].
Most of the techniques proposed for approximate computing so far are based on replacing parts of an algorithm by a neural network and executing it in a dedicated hardware [*]. Our group takes a different approach by exploiting the notion of repetition in code sequences (reuse). Very often in programs a code region that is tolerable to approximation executes multiple times with similar inputs, inefficiently computing similar results each time. By keeping these results in a table and checking it before the code region executes, it is possible to replace an expensive computation by a simple memory access - saving time and energy. Our most recent work has demonstrated the potential of the approach [*].