Fernanda Lima Kastensmidt joined the Instituto de Informática faculty in 2005. She received a PhD in 2003 and MSE in 1999 both in Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS) in Porto Alegre, RS, Brazil. Dr. Fernanda’s current research focuses on soft error mitigation techniques for SRAM-based FPGAs and integrated circuits, such as microprocessors, memories and network-on-chips (NoCs), and the analysis and modeling of radiation effects in those circuits.
She currently advises MSE and PhD thesis at the Computer Science Graduation Program (PPGC) http://ppgc.inf.ufrgs.br/ and at the Microelectronics Program (PGMICRO) http://www.inf.ufrgs.br/pgmicro/.
She has published the book Fault-Tolerance Techniques for SRAM-based FPGAs in 2006.
She is IEEE member.


  • Radiation Effects
  • SET characterization in logic circuits and clock trees
  • Fault tolerant techniques in FPGAs, in Software for embedded processors and in Digital Logic and transistor level
  • Satellite system applications
  • NoC Desing, Modeling, Testing, Fault tolerance
  • Projects with Nanosatellites
  • Projects with radiation ground testing for TID and SEE


Fernanda Lima Kastensmidt, Ricardo Reis, Luigi Carro, Fault-Tolerance Techniques for SRAM-Based FPGAs (Frontiers in Electronic Testing), Springer, 2006.

Ricardo Reis, Raoul Velazco, Pascal Fouillat (Editors). Radiation Effects in Embedded Systmes, Springer, 2010 Ed. Chapter: Fault Tolerance in Programmable Circuits. Autrors: Fernanda Lima Kastensmidt, Ricardo Reis.

VEasy: a Tool Suite for Teaching Functional Verification: Teaching the principles of Functional Verification in an intuitive way [Paperback] Samuel Nascimento Pagliarini (Author), Fernanda Lima Kastensmidt (Author), LAP LAMBERT Academic Publishing (June 27, 2012), ISBN-10: 3659143324


IEEE NSREC - , Short Course, 2007
SEE Mitigation Strategies for Digital Circuit Design Applicable to ASIC and FPGAs
Author:Fernanda Lima Kastensmidt

AHS - NASA/ESA Conference on Adaptive Hardware and Systems, Tutorial, 2011
Building reconfigurable hardware for Space using commercial-­off-­the shelf FPGAs: challenges and possible solutions
Authors: Fernanda Lima Kastensmidt & Massimo Violante
Summary: The use of reconfigurable hardware in space is often advocated as the solution for fixing design bugs when the system is in orbit, for expanding the lifetime of systems already deployed in the field by improving year after year the functionalities it implements, and for boosting the execution of computing-­intensive applications. For these purposes, reconfigurable field programmable gate arrays (FPGAs) are the enabling technology, as they offer an effective mean for implementing efficient user-­customizable hardware that can be modified when the system is already deployed in the field. When facing the problem of selecting the best reconfigurable FPGAs for implementing reconfigurable hardware, designers have a number of choices with their advantages and disadvantages. The purpose of this tutorial is to outline the problems arising from the use of reconfigurable FPGAs in space, and to present possible solutions. During the tutorial the following topics will be covered.

1. The impact of the space radioactive environment on re-configurable FPGAs (40 minutes) a. The transistor-level point of view. b. The circuit-level point of view.

2. Mitigation techniques for effective use of re-configurable FPGAs in space (50 minutes). a. Hardening by design: the Atmel ATF280E case. b. Hardening by architecture: i. The Xilinx Virtex case. ii. The Actel ProASIC case.

3. The key role of design tools (30 minutes): a. Synthesis tool. b. Place & route tools. c. Validation tools.

SERESSA - International School on the Effects of Radiation on Embedded Systems for Space Applications
SEE and TID effects and Mitigation Techniques for FPGAs
Author: Fernanda Lima Kastensmidt


Universidade Federal do Rio Grande do Sul

Instituto de Informática

Av. Bento Gonçalves, 9500 - Campus do Vale - Bloco IV Bairro Agronomia - Porto Alegre - RS - Brasil CEP 91501-970 Caixa Postal: 15064

E-mail: fglima (at) inf.ufrgs.br

Phone: +55 51 3308-7036

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