Entrena, L.; Lindoso, A.; Millan, E. S.; Pagliarini, S.; Almeida, F.; Kastensmidt, F. Constrained Placement Methodology for Reducing SER Under Single-Event-Induced Charge Sharing Effects. IEEE Transactions on Nuclear Science, Volume: PP , Issue: 99. DOI 10.1109/TNS.2012.2191796, 2012.

Azambuja, J., Altieri, M.. Pagliarini, S., Kastensmidt, F., Becker, J. Hubner, M., Gilles, F., Velazco, R. A Fault Tolerant Approach to Detect Transient Faults in Microprocessors Based on a Non-Intrusive Reconfigurable Hardware. IEEE Transactions on Nuclear Science, Volume: PP , Issue: xx. 2012 <to appear>

2001 - 2011

1. Azambuja, José Rodrigo ; Lapolli, Ângelo ; Rosa, Lucas ; Kastensmidt, Fernanda Lima . <![CDATA[Detecting SEEs in Microprocessors Through a Non-Intrusive Hybrid Technique]]>. IEEE Transactions on Nuclear Science, p. 1, 2011.

2. KASTENSMIDT, F. L. ; CHIPANA, R. ; GONCALEZ, O. L. ; Junior, E. ; VAZ, R. G. . TID in Flash-based FPGA: Power Supply-current Rise and Logic Function Mapping Effects in Propagation-delay Degradation. IEEE Transactions on Nuclear Science, v. PP, p. 1-8, 2011.

3. AZAMBUJA, J. R. ; PAGLIARINI, S. ; ROSA, L. ; KASTENSMIDT, F. L. . Exploring the Limitations of Software-based Techniques in SEE Fault Coverage. Journal of Electronic Testing, v. 1, p. 1-10, 2011.

4. CONCATTO, C. ; Almeida, João ; Fachini, Guilherme ; HERVE, M. ; KASTENSMIDT, F. L. ; COTA, E. ; LUBASZEWSKI, M. . Improving the yield of NoC-based systems through fault diagnosis and adaptive routing. Journal of Parallel and Distributed Computing (Print), v. 71, p. 664-674, 2011.

5. LAZZARI, Cristiano ; WIRTH, G. ; KASTENSMIDT, F. L. ; Anghel, L. ; REIS, Ricardo . Asymmetric Transistor Sizing Targeting Radiation-Hardened Circuits. Journal of Electrical Engineering (RAD), v. 93, p. 1-8, 2011.

6. Matos, Debora ; Concatto, Caroline ; Kologeski, Anelise ; CARRO, Luigi ; Kreutz, Marcio ; Kastensmidt, Fernanda ; Susin, Altamiro . A NOC closed-loop performance monitor and adapter. Microprocessors and Microsystems, p. 1-10, 2011.

7. Matos, Débora ; Concatto, Caroline ; Kreutz, Márcio ; CARRO, Luigi ; Susin, Altamiro ; KASTENSMIDT, F. L. . <![CDATA[Reconfigurable Routers for Low Power and High Performance]]>. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Print), p. 1-14, 2010.

8. Bastos, R.P. ; SICARD, G. ; RENAUDIN, M. ; Reis, R. ; KASTENSMIDT, F. L. . Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies. Microelectronics and Reliability, v. 50, p. 1241-1246, 2010.

9. Balen, Tiago R. ; Leite, Franco ; Kastensmidt, Fernanda Lima ; Lubaszewski, Marcelo . <![CDATA[A Self-Checking Scheme to Mitigate Single Event Upset Effects in SRAM-Based FPAAs]]>. IEEE Transactions on Nuclear Science, v. 56, p. 1950-1957, 2009.

10. BASTOS, R. ; KASTENSMIDT, F. L. ; REIS, Ricardo . Design of a soft-error robust microprocessor. Microelectronics Journal, v. 40, p. 1062-1068, 2009.

11. WIRTH, G. ; VIEIRA, Michele ; HENES NETO, E. C. ; KASTENSMIDT, F. L. . Modeling the sensitivity of CMOS circuits to radiation induced single event transients. Microelectronics and Reliability, v. 48, p. 29-36, 2008.

12. KASTENSMIDT, F. L. ; HENES NETO, E. C. ; WIRTH, G. . Mitigating Soft Errors in SRAM Address Decoders Using Built-In Current Sensors. Journal of Electronic Testing, v. 1, p. 1-10, 2008.

13. PETROLI, L. ; LISBOA, C. L. ; KASTENSMIDT, F. L. ; CARRO, Luigi . Majority Logic Mapping for Soft Error Dependability. Journal of Electronic Testing, v. 24, p. 83-92, 2008.

14. Neto, Egas Henes ; KASTENSMIDT, F. L. ; Wirth, Gilson . <![CDATA[Tbulk-BICS: A Built-In Current Sensor Robust to Process and Temperature Variations for Soft Error Detection]]>. IEEE Transactions on Nuclear Science, v. 55, p. 2281-2288, 2008.

15. Cota, Érika ; Kastensmidt, Fernanda Lima ; Cassel, Maico ; Hervé, Marcos ; Almeida, Pedro ; Meirelles, Paulo ; Amory, Alexandre ; Lubaszewski, Marcelo . <![CDATA[A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip]]>. I.E.E.E. Transactions on Computers (Print), v. 57, p. 1202-1215, 2008.

16. Wirth, Gilson ; Kastensmidt, Fernanda L ; Ribeiro, Ivandro ; Kastensmidt, Fernanda Lima . <![CDATA[Single Event Transients in Logic Circuits Load and Propagation Induced Pulse Broadening]]>. IEEE Transactions on Nuclear Science, v. 55, p. 2928-2935, 2008.

17. WIRTH, G. ; VIEIRA, Michele ; KASTENSMIDT, F. L. . Accurate and Computer Efficient Modeling of Single Event Transients in CMOS Circuits. IEE Proceedings. Circuits, Devices and Systems, v. 1, p. 137-142, 2007.

18. REORDA, M. ; STERPONE, L. ; Violante, M. ; KASTENSMIDT, F. L. ; CARRO, Luigi . Evaluating different solutions to design fault tolerant systems with SRAM-based FPGAs. Journal of Electronic Testing, v. 23, p. 47-54, 2007.

19. FRANTZ, A. P. ; CASSEL, M. ; KASTENSMIDT, F. L. ; COTA, E. ; CARRO, Luigi . Crosstalk and SEU-Aware Networks on Chips. IEEE Design and Test of Computers, v. 24, p. 340-350, 2007.

20. EGAS NETO, ; VIEIRA, Michele ; RIBEIRO, I. ; WIRTH, G. ; KASTENSMIDT, F. L. . Using Bulk Built-in Current Sensors in Combinational and Sequential Logic to Detect Soft Errors. IEEE Micro, IEEE Computer Society, v. 26, p. 10-18, 2006.

21. KASTENSMIDT, F. L. ; KINZEL FILHO, C. ; CARRO, Luigi . Improving Reliability of SRAM Based FPGAs by Inserting Redundant Routing. IEEE Transactions on Nuclear Science, New York, v. 53, n. 4, p. 2060-2068, 2006.

22. NEUBERGER, Gustavo ; KASTENSMIDT, F. L. ; REIS, Ricardo . An Automatic Technique for Optimization of Reed-Solomon Codes to Improve Fault-tolerance in Memories. IEEE Design and Test of Computers, USA, v. 22, n. 1, p. 50-58, 2005.

23. KASTENSMIDT, F. L. ; NEUBERGER, Gustavo ; CARRO, Luigi ; REIS, Ricardo . Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. Revista de Informática Teórica e Aplicada, Porto Alegre, v. XII, n. 1, p. 47-60, 2005.

24. KASTENSMIDT, F. L. ; NEUBERGER, Gustavo ; CARRO, Luigi ; REIS, Ricardo ; Hentschke, R. . Designing Fault-tolerant Techniques for SRAM-based FPGAs. IEEE Design and Test of Computers, USA, v. 21, n. 6, p. 552-562, 2004.

25. NEUBERGER, Gustavo ; KASTENSMIDT, F. L. ; CARRO, Luigi ; REIS, Ricardo . A Multiple Bit Upset Tolerant SRAM Memory. ACM Transactions on Design Automation of Electronic Systems, New York, v. 8, n. 4, p. 577-590, 2003.

26. KASTENSMIDT, F. L. ; COTA, E. ; CARRO, Luigi ; REIS, Ricardo ; VELAZCO, R. . Synthesis of an 8051-like Micro-Controller Tolerant to Transient Faults. Journal of Electronic Testing, MA, USA, v. 17, n. 2, p. 149-161, 2001.


1. KASTENSMIDT, F. L. ; CARRO, Luigi ; REIS, Ricardo . Fault-Tolerance Techniques for SRAM-based FPGAs. 1. ed. New York/Boston: Springer Publishers, 2006. 180 p.

2. KASTENSMIDT, F. L. (Org.) ; REIS, Ricardo (Org.) . XIII UFRGS Microelectronics Seminar. Porto Alegre: UFRGS, 1998. v. 200. 198 p.



1. Raul Chipana, Jorge Tonfat, Fernanda Kastensmidt, Ricardo Reis. SET Susceptibility Estimation of Clock Tree Networks from Layout Extraction. LATW 2012.

2. Jose Eduardo Souza, Fernanda Kastensmidt. Applying Adaptive Temporal Filtering for SET Mitigation based on the Propagation-Delay of Every Logical Path, LATW 2012.

3. Eduardo Chielle, Raul Barth, Angelo Lapolli, Fernanda KastensmidtConfigurable Tool to Protect Processors against SEE by Software-based Detection Techniques, LATW 2012.


4. Lucas A. Tambara, Fernanda Lima Kastensmidt, Evaldo C. P. F. Junior, Odair L. Gonçalez, Tiago R. Balen, Paulo C. C. de Aguirre, Ignacio Arruego and Marcelo S. Lubaszewski, TID in a Mixed-Signal System-on-Chip: Analog Components Analysis and Clock Frequency Influence in Propagation-Delay Degradation, REDW 2012.

5. Felipe Almeida, Fernanda Lima Kastensmidt, Samuel Pagliarini, Luis Entrena, Almudena Lindoso, Enrique San Millan, Eduardo Chielli, Lirida Naviner and Jean-François Naviner, Single-Event-Induced Charge Sharing Effects in TMR with Different Levels of Granularity. RADECS 2012.

6. Jose Eduardo Souza, Felipe Almeida, Fernanda Kastensmidt. Soft Error Rate Reduction by Using Configurable SET Temporal Filtering. RADECS 2012.

7. José Rodrigo Azambuja, Mauricio Altieri, Fernanda Lima Kastensmidt, Jürgen Becker. HETA: Hybrid Error-detection Technique through Assertions. RADECS 2012.

8. Eduardo Chielle, José Rodrigo Azambuja, Raul Sério Barth, Felipe Almeida, Fernanda Lima Kastensmidt. Evaluating Selective Redundancy in Data-flow Software-based Techniques. RADECS 2012.

9. Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge Tonfat, Ricardo Reis. Soft-Error Probability Due to SET in Clock Tree Networks, ISVLSI 2012.

10. Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi CarroATARDS: An Adaptive Fault-Tolerant Strategy to Cope with Massive Defects in Network-on-Chip Interconnections, VLSI-SOC 2012.

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