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JOURNALS
1. RESTREPO-CALLE, FELIPE ; CUENCA-ASENSI, SERGIO ; MARTÍNEZ-ÁLVAREZ, ANTONIO ; Chielle, Eduardo ; Kastensmidt, Fernanda Lima . Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors. Journal of Electronic Testing, v. 1, p. 1, 2015.

2. Azambuja, José Rodrigo ; BROWN, GUSTAVO ; Kastensmidt, Fernanda Lima ; CARRO, Luigi . Algorithm transformation methods to reduce the overhead of software-based fault tolerance techniques. Microelectronics and Reliability, v. 54, p. 1050-1055, 2014.

3. TARRILLO, JIMMY ; Kastensmidt, Fernanda Lima ; RECH, P. ; FROST, C. ; VALDERRAMA, C. . Neutron Cross-Section of N-Modular Redundancy Technique in SRAM-Based FPGAs. IEEE Transactions on Nuclear Science, v. 61, p. 1558-1566, 2014.

4. Kastensmidt, Fernanda ; Tonfat, Jorge ; BOTH, T. ; RECH, PAOLO ; Wirth, Gilson ; Reis, R. ; BRUGUIER, FLORENT ; BENOIT, PASCAL ; TORRES, LIONEL ; FROST, C. . Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectronics and Reliability, p. 1, 2014.

5. Kastensmidt, F. L. ; TAMBARA, LUCAS ; BOBROVSKY, D. V. ; PECHENKIN, A. A. ; NIKIFOROV, A. Y. . Laser Testing Methodology for Diagnosing Diverse Soft Errors in a Nanoscale SRAM-Based FPGA. IEEE Transactions on Nuclear Science, p. 1-1, 2014.

6. Azambuja, José Rodrigo ; Altieri, Mauricio ; Kastensmidt, Fernanda Lima ; Becker, Jürgen . HETA: Hybrid Error-Detection Technique Using Assertions. IEEE Transactions on Nuclear Science, v. 60, p. 1-8, 2013. Citações:3|4

7. CHIELLE, E. ; AZAMBUJA, J. R. ; Barth, Raul Sergio ; Almeida, Felipe ; KASTENSMIDT, F. L. . Evaluating Selective Redundancy in Data-Flow Software-Based Techniques. IEEE Transactions on Nuclear Science, v. 60, p. 1-8, 2013. Citações:3|3

8. Azambuja, José Rodrigo ; NAZAR, G. ; RECH, P. ; CARRO, Luigi ; KASTENSMIDT, F. L. ; FAIRBANKS, T. ; QUINN, H. . Evaluating Neutron Induced SEE in SRAM-Based FPGA Protected by Hardware- and Software-Based Fault Tolerant Techniques. IEEE Transactions on Nuclear Science, v. 60, p. 4243-4250, 2013.

9. Azambuja, José Rodrigo ; Pagliarini, Samuel ; Altieri, Mauricio ; Kastensmidt, Fernanda Lima ; Hubner, Michael ; Becker, Jürgen ; Foucard, Gilles ; Velazco, Raoul . A Fault Tolerant Approach to Detect Transient Faults in Microprocessors Based on a Non-Intrusive Reconfigurable Hardware. IEEE Transactions on Nuclear Science, v. 59, p. 1117-1124, 2012. Citações:5|5

10. Entrena, Luis ; Lindoso, Almudena ; Millan, Enrique San ; Pagliarini, Samuel ; Almeida, Felipe ; Kastensmidt, Fernanda . Constrained Placement Methodology for Reducing SER Under Single-Event-Induced Charge Sharing Effects. IEEE Transactions on Nuclear Science, v. 99, p. 1-1, 2012. Citações:10|9

11. Azambuja, José Rodrigo ; Lapolli, Ângelo ; Rosa, Lucas ; Kastensmidt, Fernanda Lima . . IEEE Transactions on Nuclear Science, p. 1, 2011. Citações:12|17

12. KASTENSMIDT, F. L. ; CHIPANA, R. ; GONCALEZ, O. L. ; Junior, E. ; VAZ, R. G. . TID in Flash-based FPGA: Power Supply-current Rise and Logic Function Mapping Effects in Propagation-delay Degradation. IEEE Transactions on Nuclear Science, v. PP, p. 1-8, 2011. Citações:5|7

13. AZAMBUJA, J. R. ; PAGLIARINI, S. ; ROSA, L. ; KASTENSMIDT, F. L. . Exploring the Limitations of Software-based Techniques in SEE Fault Coverage. Journal of Electronic Testing, v. 1, p. 1-10, 2011. Citações:8|7

14. CONCATTO, C. ; Almeida, João ; Fachini, Guilherme ; HERVE, M. ; KASTENSMIDT, F. L. ; COTA, E. ; LUBASZEWSKI, M. . Improving the yield of NoC-based systems through fault diagnosis and adaptive routing. Journal of Parallel and Distributed Computing (Print), v. 71, p. 664-674, 2011.

15. LAZZARI, Cristiano ; WIRTH, G. ; KASTENSMIDT, F. L. ; Anghel, L. ; REIS, Ricardo . Asymmetric Transistor Sizing Targeting Radiation-Hardened Circuits. Journal of Electrical Engineering (Timi?oara), v. 93, p. 1-8, 2011.

16. Matos, Debora ; Concatto, Caroline ; Kologeski, Anelise ; CARRO, Luigi ; Kreutz, Marcio ; Kastensmidt, Fernanda ; Susin, Altamiro . A NOC closed-loop performance monitor and adapter. Microprocessors and Microsystems, p. 1-10, 2011.

17. TARRILLO, J. ; AZAMBUJA, J. R. ; KASTENSMIDT, F. L. ; Junior, E. ; VAZ, R. G. ; GONCALEZ, O. L. . Analyzing the Effects of TID in an Embedded System Running in a Flash-Based FPGA. IEEE Transactions on Nuclear Science, v. 58, p. 2855-2862, 2011. Citações:2|2

18. Pagliarini, Samuel ; Kastensmidt, Fernanda ; Entrena, Luis ; Lindoso, Almudena ; Millan, Enrique San . . IEEE Transactions on Nuclear Science, v. 58, p. 1-8, 2011. Citações:14|17

19. STERPONE, L. ; Battezzati, N. ; KASTENSMIDT, F. L. ; CHIPANA, R. . An Analytical Model of the Propagation Induced Pulse Broadening (PIPB) Effects on Single Event Transient in Flash-Based FPGAs. IEEE Transactions on Nuclear Science, v. 58, p. 2333-2340, 2011. Citações:3|7

20. Matos, Débora ; Concatto, Caroline ; Kreutz, Márcio ; CARRO, Luigi ; Susin, Altamiro ; KASTENSMIDT, F. L. . . IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Print), p. 1-14, 2010. Citações:5|12

21. Bastos, R.P. ; SICARD, G. ; RENAUDIN, M. ; Reis, R. ; KASTENSMIDT, F. L. . Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies. Microelectronics and Reliability, v. 50, p. 1241-1246, 2010. Citações:2|3

22. Balen, Tiago R. ; Leite, Franco ; Kastensmidt, Fernanda Lima ; Lubaszewski, Marcelo . . IEEE Transactions on Nuclear Science, v. 56, p. 1950-1957, 2009. Citações:2|9

23. BASTOS, R. ; KASTENSMIDT, F. L. ; REIS, Ricardo . Design of a soft-error robust microprocessor. Microelectronics Journal, v. 40, p. 1062-1068, 2009.

24. WIRTH, G. ; VIEIRA, Michele ; HENES NETO, E. C. ; KASTENSMIDT, F. L. . Modeling the sensitivity of CMOS circuits to radiation induced single event transients. Microelectronics and Reliability, v. 48, p. 29-36, 2008. Citações:13|15

25. KASTENSMIDT, F. L. ; HENES NETO, E. C. ; WIRTH, G. . Mitigating Soft Errors in SRAM Address Decoders Using Built-In Current Sensors. Journal of Electronic Testing, v. 1, p. 1-10, 2008. Citações:3|3

26. PETROLI, L. ; LISBOA, C. L. ; KASTENSMIDT, F. L. ; CARRO, Luigi . Majority Logic Mapping for Soft Error Dependability. Journal of Electronic Testing, v. 24, p. 83-92, 2008.

27. Neto, Egas Henes ; KASTENSMIDT, F. L. ; Wirth, Gilson . . IEEE Transactions on Nuclear Science, v. 55, p. 2281-2288, 2008. Citações:6|10

28. Cota, Érika ; Kastensmidt, Fernanda Lima ; Cassel, Maico ; Hervé, Marcos ; Almeida, Pedro ; Meirelles, Paulo ; Amory, Alexandre ; Lubaszewski, Marcelo . . I.E.E.E. Transactions on Computers (Print), v. 57, p. 1202-1215, 2008. Citações:12|19

29. Wirth, Gilson ; Kastensmidt, Fernanda L ; Ribeiro, Ivandro ; Kastensmidt, Fernanda Lima . . IEEE Transactions on Nuclear Science, v. 55, p. 2928-2935, 2008. Citações:20|29

30. WIRTH, G. ; VIEIRA, Michele ; KASTENSMIDT, F. L. . Accurate and Computer Efficient Modeling of Single Event Transients in CMOS Circuits. IEE Proceedings. Circuits, Devices and Systems, v. 1, p. 137-142, 2007. Citações:13|17

31. REORDA, M. ; STERPONE, L. ; Violante, M. ; KASTENSMIDT, F. L. ; CARRO, Luigi . Evaluating different solutions to design fault tolerant systems with SRAM-based FPGAs. Journal of Electronic Testing, v. 23, p. 47-54, 2007. Citações:6|7

32. FRANTZ, A. P. ; CASSEL, M. ; KASTENSMIDT, F. L. ; COTA, E. ; CARRO, Luigi . Crosstalk and SEU-Aware Networks on Chips. IEEE Design and Test of Computers, v. 24, p. 340-350, 2007. Citações:16|28

33. EGAS NETO, ; VIEIRA, Michele ; RIBEIRO, I. ; WIRTH, G. ; KASTENSMIDT, F. L. . Using Bulk Built-in Current Sensors in Combinational and Sequential Logic to Detect Soft Errors. IEEE Micro, IEEE Computer Society, v. 26, p. 10-18, 2006. Citações:27|37

34. KASTENSMIDT, F. L. ; KINZEL FILHO, C. ; CARRO, Luigi . Improving Reliability of SRAM Based FPGAs by Inserting Redundant Routing. IEEE Transactions on Nuclear Science, New York, v. 53, n.4, p. 2060-2068, 2006. Citações:1|6

35. NEUBERGER, Gustavo ; KASTENSMIDT, F. L. ; REIS, Ricardo . An Automatic Technique for Optimization of Reed-Solomon Codes to Improve Fault-tolerance in Memories. IEEE Design and Test of Computers, USA, v. 22, n.1, p. 50-58, 2005. Citações:10|13

36. KASTENSMIDT, F. L. ; NEUBERGER, Gustavo ; CARRO, Luigi ; REIS, Ricardo . Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. Revista de Informática Teórica e Aplicada, Porto Alegre, v. XII, n.1, p. 47-60, 2005.

37. KASTENSMIDT, F. L. ; NEUBERGER, Gustavo ; CARRO, Luigi ; REIS, Ricardo ; Hentschke, R. . Designing Fault-tolerant Techniques for SRAM-based FPGAs. IEEE Design & Test of Computers (Print), USA, v. 21, n.6, p. 552-562, 2004. Citações:22|69

38. NEUBERGER, Gustavo ; KASTENSMIDT, F. L. ; CARRO, Luigi ; REIS, Ricardo . A Multiple Bit Upset Tolerant SRAM Memory. ACM Transactions on Design Automation of Electronic Systems, New York, v. 8, n.4, p. 577-590, 2003. Citações:14|31

39. KASTENSMIDT, F. L. ; COTA, E. ; CARRO, Luigi ; REIS, Ricardo ; VELAZCO, R. . Synthesis of an 8051-like Micro-Controller Tolerant to Transient Faults. Journal of Electronic Testing, MA, USA, v. 17, n.2, p. 149-161, 2001. Citações:1|8

BOOKS

1. Azambuja, José Rodrigo ; Kastensmidt, Fernanda ; Becker, Jürgen . Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors. 1. ed. New York: Springer International Publishing, 2014. v. 1. 94p .

2. PAGLIARINI, S. ; Kastensmidt, Fernanda Lima . VEasy: a Tool Suite for Teaching Functional Verification: Teaching the principles of Functional Verification in an intuitive way. 1. ed. Saarbrücken: LAP LAMBERT Academic Publishing, 2012. v. 1. 120p .

3. Kastensmidt, Fernanda Gusmão de Lima ; CARRO, Luigi ; REIS, Ricardo . Fault-Tolerance Techniques for SRAM-based FPGAs. 1. ed. New York/Boston: Springer Publishers, 2006. 180p .

Chapters

1. TAMBARA, LUCAS A. ; Almeida, Felipe ; RECH, PAOLO ; Kastensmidt, Fernanda L. ; Bruni, Giovanni ; FROST, CHRISTOPHER . Measuring Failure Probability of Coarse and Fine Grain TMR Schemes in SRAM-based FPGAs Under Neutron-Induced Effects. Lecture Notes in Computer Science. 1ed.: Springer International Publishing, 2015, v. , p. 331-338.

2. Kologeski, Anelise ; Concatto, Caroline ; Kastensmidt, Fernanda Lima ; CARRO, Luigi . Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections. IFIP Advances in Information and Communication Technology. 1ed.: Springer Berlin Heidelberg, 2013, v. , p. 144-161.

3. Kastensmidt, Fernanda Lima ; REIS, Ricardo . Fault Tolerance in Programmable Circuits. In: Ricardo Reis, Raoul Velazco, Pascal Fouillat. (Org.). Radiation Effects on Embedded Systems. 1ed.New York: Springer Netherlands, 2007, v. , p. 161-181.

4. KASTENSMIDT, F. L. . SEE Mitigation Strategies for Digital Circuit Design Applicable to ASIC and FPGAs. In: Hugh Barnaby. (Org.). IEEE NSREC Short Course. 1ed.Los Alamos: IEEE, 2007, v. , p. 1-75.

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