Programação >> Victor Champac Palestrante Victor Champac Título Design & Test in Nanometer Technologies Resumo This talk will present test techniques dealing with issues appearing due to the scaling of the technology. The bevavior of some defects in nanometer technolgies may be significantly influenced with the technology and topology of the circuits. Hence, test oriented techniques are required to improve their defect coverage. In addition, due to scaling some signal integrity issues have become important. Hence, signal integrity test is also required for actual complex circuits. In this talk will be discussed some mechanisms influencing the signal integrity and will be shown some approaches to test signal integrity compliance. Biografia Resumida Victor Champac received the Electrical Engineering Degree in 1987 from the Autonomous University of Nuevo Leon, Mexico. He received the Ph.D. degree in 1993 from the Polytechnic University of Catalonia (UPC), Spain. From 1988 to 1993 he was Associate Professor at the Electronic Engineering Department of the UPC. In 1993 he joined the National Institute for Astrophysics, Optics and Electronics (Mexico) where he is Titular Professor. He is member of the Mexican National Research System-Level 2. During the period July 2000- July 2001 he was doing with Motorola research and technological development. He has published more than 60 papers in international conferences and journals. He has been the responsible researcher in projects founded by the National Council for Science and Technology-Mexico. Dr. Champac was co-founder of the Test Technology Technical Council-Latin America of IEEE Computer Society. He was Vice-Chair of this organization in the period 1999-2003. Dr. Champac was the President of the Program Committee of the 1st IEEE Latin American Test Workshop held in Brazil in 2000. He was co-General Chair of the 2nd and 9th IEEE Latin American Test Workshop held in Mexico in 2001 and 2008 respectively. He serves as Guest Editor of the Journal of Electronics Testing (Kluwer Academic Publisher). He is actually member of the Board Director of JETTA. He has been the President of the Program Committee of the International Conference of Devices, Circuits and Systems in Mexico in 2003 and of the International Conference on Electronic Design in Mexico in 2004. He participates in the Program Committee of several international conferences. He also serves as reviewer in several international conferences and journals. His research lines are: defect modeling in nanometer technologies, Development of new test strategies for advanced technologies, Verification of Signal Integrity, Process Variation Tolerant VLSI Circuit Design and Noise tolerant circuit design