Program >> Mustafa Ozdal (Intel, Oregon, USA)


Speaker
Mustafa Ozdal (Intel, Oregon, USA)

Title
Lagrangian Relaxation Based Optimization of Discrete Gate Sizes and Device Technology Parameters

Abstract
The traditionally low-power devices (e.g. cell phones) are now tackling increasingly compute intensive tasks, while the high-performance systems (e.g. servers) have more stringent power constraints. So, it is important to achieve the right balance between high performance and low power objectives. Circuit optimization allows trading off power and performance by choosing the appropriate library cell size and leakage level for each cell in the circuit from a standard cell library. In this talk, I will outline some of the practical problems that make it difficult to use the traditional gate sizing algorithms on high-performance industrial designs. Then, I will summarize our recent work based on Lagrangian Relaxation to address these problems. I will also provide a brief summary of the discrete gate sizing contests we organized in 2012 and 2013 as part of the International Symposium on Physical Design.

SHORT CVs
Mustafa Ozdal received his B.S. degree in electrical engineering (1999), and M.S. degree in computer engineering (2001) from Bilkent University, Turkey. He obtained the Ph.D. degree in computer science from the University of Illinois at Urbana-Champaign in 2005. He was a recipient of the IEEE William J. McCalla ICCAD Best Paper Award in 2011, and the ACM SIGDA Technical Leadership Award in 2012.He has served as the program and general chair of IEEE/ACM SLIP, contest and publicity chair of ACM ISPD, and technical program committee member of the following conferences: ICCAD, DAC, DATE, ISPD, ISLPED, and SLIP. He is currently a research scientist in the Strategic CAD Labs of Intel Corporation. His research interests include heterogeneous computing, hardware/software co-design, and algorithms for VLSI CAD.