Program >> Mustafa Ozdal (INTEL, USA)


Speaker
Mustafa Ozdal (INTEL, USA)

Title
Trace Based Workload Analysis of Heterogeneous Architectures with Asymmetric Cores

Abstract
As device sizes continue to reduce with technology scaling, we can fit more and more functionality into fixed size dies. However, due to power constraints, only a subset of these devices can be active at any given time. As technology scaling continues, it is projected that increasingly large parts of a die will remain “dark” (inactive) or “dim” (not operating at full performance). In the dark silicon era, heterogeneous architectures have the potential to be more effective, because the right set of compute units can be chosen based on the workloads being executed. In this talk, I will focus on heterogeneous systems with single-ISA asymmetric cores, where the core type to execute a given workload is determined dynamically during runtime. I will talk about the challenges related to the offline analysis of such systems, and I will present our recent work on trace-based analysis. The basic idea of this work is to collect multiple traces by running a workload on different homogeneous platforms, and to align these traces for offline analysis. For this, we propose a wavelet-based similarity metric, which captures both fine-grain and coarse-grain software phases across different traces. The proposed methodology can enable design space exploration of single-ISA heterogeneous multi-core systems using traces from off-the-shelf homogeneous systems.

SHORT CVs
Mustafa Ozdal received his B.S. degree in electrical engineering (1999), and M.S. degree in computer engineering (2001) from Bilkent University, Turkey. He obtained the Ph.D. degree in computer science from the University of Illinois at Urbana-Champaign in 2005. He was a recipient of the IEEE William J. McCalla ICCAD Best Paper Award in 2011, and the ACM SIGDA Technical Leadership Award in 2012.He has served as the program and general chair of IEEE/ACM SLIP, contest and publicity chair of ACM ISPD, and technical program committee member of the following conferences: ICCAD, DAC, DATE, ISPD, ISLPED, and SLIP. He is currently a research scientist in the Strategic CAD Labs of Intel Corporation. His research interests include heterogeneous computing, hardware/software co-design, and algorithms for VLSI CAD.