Poster Session 2: Friday, October 23.

2.1.	High Throughput SAD Architecture for Quality HEVC Encoding Brunno Abreu, Mateus Grellert and Sergio Bampi, UFRGS
2.2.	A tool for Fault Insertion Simulation in CMOS Circuits Ygor Aguiar^1, Alexandra Lackmann Zimpeck^2 and Cristina Meinhardt^1, FURG^1, UFRGS^2
2.3.	Evaluation of different SRAM cell topologies in 32nm technology Roberto Almeida, Paulo Butzen and Cristina Meinhardt, FURG
2.4.	Low Latency Izhikevich's Simple Neuron Model on FPGA Vitor Bandeira, Vivianne L. Costa, Guilherme Bontorin and Ricardo Reis, UFRGS
2.5.	Integration of the uCLinux on the TVD-SoC Architecture for the Brazilian Digital TV Ana Luiza Brod, Cezar Rodolfo Wedig Reinbrecht and Altamiro Amadeu Susin, UFRGS
2.6.	An Optimization-Based Design Methodology for Fully Differential Amplifiers Arthur Campos de Oliveira^1, Paulo de Aguirre^2, Lucas Compassi Severo^2and Alessandro Girardi^2, UFRGS1, UNIPAMPA^2
2.7.	Development of a DSP module in VHDL with use of SIS/SIL techniques Bruna Fernandes Flesch, Rodrigo Marques Figueiredo, Lucio Rene Prade, Marcio Rosa Da Silva and Bianca Brand, Unisinos
2.8. J	Generating a Multiple Program Transport Stream for SBTVD Jefferson Johner, Cezar Rodolfo Wedig Reinbrecht and Altamiro Amadeu Susin, UFRGS
2.9.	Integration of ISDB-T NIM Tuner on TVD-SoC for Brazilian Digital TV Set-top Boxes Paulo Kipper, Cezar Rodolfo Wedig Reinbrecht and Altamiro Amadeu Susin, UFRGS
2.10.	Adjusting Video Tiling to Available Resources in a Per-frame Basis in HEVC Giovani Malossi^1, Daniel Palomino^2, Cláudio Diniz^2, Sergio Bampi^1 and Altamiro Susin^1, UFRGS1, UFPel^2
2.11.	Profile and Analysis of Memory Hierarchies for High Efficiency Video Coding – HEVC Ana Mativi, Eduarda Monteiro and Sergio Bampi, UFRGS
2.12.	A Reconfigurable Operational Amplifier in 180nm CMOS Technology Mateus C. S. Oliveira, Paulo César C. de Aguirre, Lucas C. Severo and Alessandro Girardi, UNIPAMPA
2.13.	A Educational Tool for VLSI Global Placement Gabriel Porto, Cristina Meinhardt and Paulo Francisco Butzen, FURG
2.14.	Set-top Box Interface Software Pedro Portugal and Altamiro Susin, UFRGS
2.15.	Evaluating Devices Behavior in CMOS and FinFET Technologies Giane Ulloa and Cristina Meinhardt, FURG