3D-CMOS Neuromorphic Imager with Cortical Layer Interconnects Pedro Julian, UNS, Argentina Abstract Three-dimensional (3D) integration is an emerging technology that allows vertical interconnects between layers of integrated circuits (IC) through micrometer-sized metallic plugs (vias). This technology extends the integration density of ICs to the third dimension by stacking and interconnecting several wafers. 3D integration further allows combination of different semiconductor technologies for high-performance hybrid systems that combine tailored optical characteristics of image sensing on one wafer with analog and digital processing on other dedicated wafers. From a neuromorphic engineering perspective, 3D integration provides an equivalent to the layered structure of the visual system from the retina through visual cortex. This talk describes the system architecture of a 3D-CMOS integrated circuit consisting of an imager with pixel processing capabilities through vertical interconnects between CMOS wafers, inspired by a cellular neural network-type structure that models select layers of cortical processing, for applications in computer vision. The experiences with one experimental and one commercial process will be shared. Short bio: Pedro M. Julian received the Electronic Engineer degree in 1994 and the Ph.D. degree in "Control de Sistemas" in 1999, both from Universidad Nacional del Sur (UNS), Bahia Blanca, Argentina. He was visiting scholar at the University of California at Berkeley from 2000 to 2002 and at Johns Hopkins University from 2002 to 2003. He holds positions as an Associate Professor in the Departamento de Ingeniera Electrica y Computadoras (DIEC) at UNS, as an Independent Researcher in the National Research Council of Argentina (CONICET) and as a visiting Adjoint Professor in The Johns Hopkins University. His research interests include theory and applications of computational circuits and systems, electronic systems, in particular sensory processors (acoustic and vision), with emphasis on low power VLSI systems. He served as the Region 9 (Latin America) Vice President and on the Board of Governors of the IEEE Circuits and Systems Society (CASS) from 2004-2007, and he is a founding member of the Latin American Consortium for Integrated Services (LACIS) and the Argentine School of Microelectronics (EAMTA). He is recipient of the Houssay 2009 Prize of the National Ministry of Science and Technology of the Argentina Republic. He also serves as Associate Editor of the International Journal of Circuit Theory and Applications, the CASS Magazine and the CASS Newsletter.