Developed at Logic Circuit Synthesis Labs (LogiCS) - UFRGS

http://www.inf.ufrgs.br/logics/

Author:
Carlos Eduardo Klock - ceklock@inf.ufrgs.br

Advisors:
Renato Perez Ribas - rpribas@inf.ufrgs.br
Andre Inacio Reis - andreis@inf.ufrgs.br