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Tese de Doutorado de Marcos Tomazzoli Leipnitz


Detalhes do Evento


DEFESA DE TESE DE DOUTORADO

Aluno: Marcos Tomazzoli Leipnitz
Orientador: Prof. Dr. Gabriel Luca Nazar

Título: Integrating Constraint Awareness and Multiple Approximation Techniques in High-Level Synthesis for FPGAs
Linha de Pesquisa: Sistemas Embarcados

Data: 11/10/2022
Horário: 9h
Local: Esta banca ocorrerá de forma totalmente remota. Interessados em assistir a defesa poderão acessar a sala virtual através do link:  https://meet.google.com/tji-huip-rdh

Banca Examinadora:
Prof. Dr. Lucas Francisco Wanner (Unicamp)
Prof. Dr. Ricardo dos Santos Ferreira (UFV)
Prof. Dr. Antônio Carlos Schneider Beck Filho (UFRGS)

Presidente da Banca: Prof. Dr. Gabriel Luca Nazar

Abstract: The adoption of High-Level Synthesis (HLS) targeting Field-Programmable Gate Arrays (FPGAs) has increased as the latest HLS tools have evolved to provide high-quality results while increasing productivity and reducing time-to-market. Concurrently, numerous approximate computing (AC) techniques have been developed to reduce design costs in error-resilient application domains, such as signal and multimedia processing, data mining, machine learning, and computer vision, to trade-off computation accuracy with area and power savings or performance improvements. However, selecting adequate techniques for each application and optimization target is complex but crucial for high-quality results. In this context, many works have proposed incorporating AC techniques within HLS toolchains to alleviate the burden of hand-crafting approximate circuits, i.e., designers can resort to approximate HLS (AHLS) tools to automate the exploitation of AC techniques when attempting to make a design meet the specified requirements. However, previous AHLS design methodologies do not allow specifying a set of design metrics constraints to guide the exploration of approximate circuits towards meeting the aimed optimizations. Moreover, they are typically tied to a single approximation technique or a difficult-to-extend set of techniques whose exploitation is not fully automated or steered by optimization targets. Therefore, available AHLS tools overlook the benefits of expanding the design space by mixing diverse approximation techniques toward meeting specific design objectives with minimum error. This thesis proposes that a constraint-aware AHLS methodology for FPGAs, able to automatically identify efficient combinations of multiple AC techniques for different applications and design optimizations, would be a promising option to manage the design effort of adopting the AC design paradigm while optimizing the quality of results. Experimental results over a set of signal and image processing benchmarks show that, on average, a reduction of about 30% in error measure, ranging from 9.5% to 52% depending on the target constraints (resources, worst-case execution time, or both), can be obtained when compared to constraint-oblivious approaches relying on unconstrained or error-constrained design methodologies. Moreover, additional improvements varying from 5% to 30% (about 18% on average) can be attained when constraint awareness is exploited with multiple AC techniques.

Keywords: High-level synthesis. Approximate computing. Design space exploration. Field-Programmable Gate Array.