Submission Guidelines

Accepted and presented papers will be published in IEEE Xplore®. All manuscripts will be blind reviewed by at least three members of the program committee. Submissions should be a complete manuscript of novel unpublished work (not to exceed 8 pages of single spaced text, including figures and tables) or, in special cases, may be a summary of relevant work. Submissions should be in pdf-format. Templates can be found at:
To submit a proposal for a panel session, special session, industrial session, tutorial, a workshop, a demo, a PhD forum, or, if you have a birds of a feather (BOF) proposal, or, have questions, please contact the program chairs.

Call for papers to download

Topics of Interest:

Papers are solicited on, but not limited to, the following topics:

Timing and Performance

  • Methodologies and tools for the analysis, design and verification of timing and performance properties of integrated circuits and systems at all levels of abstraction;
  • Design for yield, design for manufacturability;
  • Simulation tools;
  • Design and issues concerning asynchronous systems;
  • Special timing or performance related topics, e.g. synchronization, side-channel attacks.
  • Coupling efffects: analysis, modelling, simulation & experimentation

Low Power and Thermal-aware Design

  • Design techniques for thermal-aware and low power circuits and systems
  • Power/thermal-aware synthesis and floorplanning
  • Policies for power and thermal optimization
  • Power/Thermal Estimation and Optimization
  • Power/Thermal-aware architectures
  • Hardware-software interaction for power/temperature minimization
  • Energy-harvesting
  • Low Power Systems: wireless sensor networks, mobile computing

Compilers, operating systems and runtime systems

  • Power efficiency through parallelizing compilers or parallel programming
  • Concepts for programming novel multi-core architectures
  • Real-time system compilers, operating systems and run-time systems

FPGAs and GPU-based accelerators

  • Novel accelerator-based architectures and architectural features
  • High-Level Abstractions and CAD tools for using accelerators
  • Neuro-Inspired Accelerators for Computing
  • Customized processor instruction sets
  • Compilers optimizing for dynamically reconfigurable processor arrays (DRPAs)
  • Case studies and challenges on DRPAs and accelerators

Power-efficient High-performance ICT and Data Centers

  • Supercomputing: compilers, operating systems, run time systems
  • Hardware-software interaction for low power high-performance
  • Modeling and analysis of energy costs for ICT subsystems and infrastructures
  • Power analysis for data centers, supercomputers, communication networks
  • Cross layer approaches and new paradigms for power efficiency in ICT
  • Power-efficient I/O interfaces and NoC design
  • Low power high performance in extreme scale supercomputing
  • Heterogeneous HPC by new storage technologies
  • Case studies: test cases, or design study challenges on data stations or supercomputers

Application-specific power efficiency by algorithmic and analytic efforts

  • Aplication of Computational Intelligence to implement high-performance systems (Neural Networks, Suport Vector Machines, Self-Organizing Maps, Neuromorphic systems)
  • Banking, financial modeling and financial database acceleration
  • Social networks, games, entertainment, ambient intelligence, ubiquitous and wearable computing
  • Bioinformatics, bio-inspired, medical, and genetics systems and life sciences
  • Physics and astronomy, weather prediction, oil and gas exploration.
  • Security systems, cryptography, object recognition and tracking, global navigation satellite systems
  • Audio/video, imaging, smart cameras, PDAs, smart image sensors, Reconfigurable Video Coding (RVC), etc. Aerospace, avionics, automotive and railway, and many other application areas

Case studies

  • Wireless health, green computing, ultra low-power embedded systems, displays
  • Examples, studies or challenges presenting innovative solutions for thermal and power efficiency
  • Studies and experiences in using Azido
  • Studies on energy efficiency by paradigm shift, by heterogeneous solutions or new storage technologies
  • Case Studies on power efficiency of data stations


Instituto de Informática - Universidade Federal do Rio Grande do Sul
Av. Bento Gonçalves, 9500 - Campus do Vale. Bloco IV
91501-970- Porto Alegre-Brazil