Nangate A/S

Digeorgia Natalie da Silva
An Estimation Method for Gate Delay Variability Model in Nanometer CMOS Technology
PGMicro / UFRGS, 2010.

Felipe de Souza Marques
Technology Mapping for Virtual Libraries Based on DAGs
PPGC / UFRGS, 2008.

Leomar Soares da Rosa Jr.
Automatic Generation and Evaluation of Transistor Networks in Different Logic Styles
PGMicro / UFRGS, 2008.

Nivea Griesbach Schuch
Geração e Avaliação de Bibliotecas de Portas Lógicas CMOS (in Portuguese)
PGMicro / UFRGS, 2010.

Osvaldo Martinello Jr.
KL-Cuts: A New Approach for Logic Synthesis Targeting Multiple Output Blocks
PPGC / UFRGS, 2010.

Thiago Rosa Figueiro
Multiple Objective Technology Independent Logic Synthesis for Multiple Output Functions Through AIG Functional Composition
PGMicro / UFRGS, 2010.

Vinicius Dal Bem
CMOS Digital Integrated Circuit Design Faced to NBTI and Other Nanometric Effects
PGMicro / UFRGS, 2010.

Simone Bavaresco
On-Silicon Testbench for Validation of Soft Logic Cell Libraries
PPGC / UFRGS, 2008.

Felipe Ribeiro Schneider
Building Transistor-Level Networks Following the Lower Bound on the Number of Stacked Switches
PPGC / UFRGS, 2007.

Paulo Francisco Butzen
Leakage Current Modeling in Sub-Micrometer CMOS Complex Gates
PPGC / UFRGS, 2007.

Tiago Muller Gil Cardoso
Exploração de Reodernamento de ROBDDs no Mapeamento Tecnológico (in Portuguese)
PPGC / UFRGS, 2007.