| Preliminary Program |
| LASCAS at a Glance |
| Wednesday: February 24th | Thursday: February 25th | Friday: February 26th | ||||||
Room |
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8:30 |
Opening | |||||||
9:00 |
Keynote Speaker - Giovanni De Micheli | Invited Speaker - Paulo Diniz | Invited Speaker - Massimo Alioto | |||||
10:00 |
Coffee-break | Coffee-break | Coffee-break | |||||
10:30 |
Session L1 | Session L2 | Session L5 | Session L6 | Session L8 | Session L9 | Session L10 | |
12:10 |
Lunch | Lunch | Lunch | |||||
14:00 |
Embedded Tutorial 1 | Embedded Tutorial 2 | Embedded Tutorial 3 | |||||
15:15 |
Poster Session and Coffee-break | Poster Session and Coffee-break | Coffee-break | |||||
15:45 |
Session L11 | Session L12 | ||||||
16:15 |
Session L3 | Session L4 | Session L7 | Special Session (Biomedical Circuits and Systems) | ||||
17:25 |
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17:55 |
Closing | |||||||
20:30 |
Conference Dinner | |||||||
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LASCAS 2010 Program
Wednesday: February 24th |
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| 8:30 | Opening |
| 9:00 to 10:00 | Nano-architectures for Tera-scale systems Keynote Speaker: Giovanni De Micheli - EPFL, Switzerland |
| 10:30 to 12:10 |
Session L1 Digital Control System Using a Thermoelectric Cell for Temperature Electronic Devices Testing João Bazzo, Jean Carlos Cardozo da Silva, Emerson Geovani Carati, Marcio Vogt and Tiago Lukasievicz. A Fuzzy Control for Optimizing the Design of Passive Electrical Circuits N. Hernández-Romero, P.A. Miranda-Romagnoli and J.C. Seck-Tuoh-Mora. On Restoring Data Coherence in a GALS System for Medical Imaging Carlos Leong, João Teixeira, Isabel Teixeira, Pedro Machado, Vasco Bexiga, Ricardo Bugalho, Miguel Ferreira, Pedro Rodrigues, José Silva, João Varela and Pedro Lousã. IMAGE INTERPOLATION USING COSINE-SINE MODULATED FILTER BANK Shusnuke Iwamura, Seisuke Kyochi, Naoto Kaneko and Masaaki Ikehara Hardware/Software Implementation of an on-line Machine Learning Algorithm Carlos Quintero, Lorena Garcia, Fernando Lozano and Mauricio Guerrero. Session L2 - Data Converters Design of a 12.5 GS/s 5-bit Folding A/D Converter Antonio Surano and Franco Maloberti. A Clock-less 8-bit A/D Converter Sabiniano Araujo Rodrigues, Jose Ivan Carnauba Accioly, Hassan Aboushady, Marie-Minerve Louerat and Raimundo Carlos Silverio Freire. A noise-insensitve offset calibration technique for time interleaved SAR ADC Ding Li, Sin Sai Weng, U Seng Pan and Rui Martins. An Area-Efficient Coarse-Fine Resistor-String D/A Converter Byung-Do Yang, Young-Kyu Shin, Keun-Chul Ryu, Jae-Joong Min, Si-Woo Sung and Jae-Mun Oh. An Architecture for First-Order Tunable Mismatch Shaping in Oversampled Data Converters Waqas Akram and Earl E. Swartzlander, Jr.. |
| 14:00 to 15:15 |
Embedded Tutorial 1 3D-CMOS Neuromorphic Imager with Cortical Layer Interconnects Pedro Julian, UNS, Argentina |
| 16:15 to 17:55 | Session L3 Design Methodology for ZCT and ZCZVT Inverters Jean Gazzoni, Cristiano Piva, Paulo Ferla, Carlos Stein and Mario Martins An Energy Based LQR Tuning Approach Applied for Uninterruptible Power Supplies João Marcos Kanieski, Emerson Giovani Caratti and Rafael Cardoso A hardware DC Motor emulator Vagner Rosa, Vitor Gervini, Sebastiao Gomes and Sergio Bampi. A Lightweight Mechanism for Dynamic Linking in Wireless Sensor Networks Carlo Brandolese, Luigi Rucco and William Fornaciari. A 128 FFT Core Implementation for Multiband Full-Rate Ultra-Wideband Receivers Bruno Fernandes and Helena Sarmento. Session L4 - RF Amplifiers A Novel Notch Filter LNA for Use in Multi-Band, Multi-Standard Cellular Receivers Dirk Bormann, Stefan Kaehlert, Tobias D. Werth and Stefan Heinen. A Fully Integrated 65 nm CMOS cascode HSFDS PA Dedicated to 802.11n Application Yohann luque, Eric Kerhervé, Nathalie Deltimple and Didier Belot. Characterization Methodology of a Millimeter-Wave 65nm CMOS PA Dedicated to 60GHz WPAN Standard Sofiane Aloui, Nicolas Delaunay, Eric Kerherve, Nathalie DELTIMPLE, Robert Plana and Didier Belot. Automatic Design of RF Linear Transconductor Diomadson Belfort. Low Voltage High performance Current Mirrors Prateek Vajpayee, A. Srivastava, S. S. Rajput and G. K. Sharma. |
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POSTER SECTION 1 Analog Circuits All-Pass Filter Employing Fully Balanced Voltage Differencing Buffered Amplifier Dalibor Biolek, Viera Biolkova and Zdenek Kolka. Incorporating Effects of Process, Voltage, and Temperature Variation in BTI Model for Circuit Design Shreyas Kumar Krishnappa, Harwinder Singh and Hamid Mahmoodi. Ultra Low-Power Super Class AB CMOS OTA Cells with Rail-to-Rail Operation Mahdi Ahangarian Abhari, adib Abrishamifar and Seyed Javad Azhari. A Framework for Circuit-Level Analog Synthesis With an Educational Approach Tiago Oliveira Weber and Cesar Ramos Rodrigues. RF Circuits Differential Continuous-Time Delta Sigma Modulator using the FGMOS Transistor Jesus de la Cruz and Noe Oliva. Design of Hardware Accelerators for Demanding Applications Lech Jozwiak and Yahya Jan An efficient technique to design linear-phase decimation filters David Ernesto Troncoso Romero and Gordana Jovanovic Dolecek. Formula Simplification using Two-Graph Method Zdenek Kolka, Martin Vlk, Dalibor Biolek, Viera Biolkova and Josef Dobes. |
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| 20:30 | Conference Dinner |
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Thursday: February 25th |
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| 9:00 to 10:00 |
Block-Based Transceivers for Wireless Networks Invited Talk: Paulo Diniz - UFRJ, Brazil |
| 10:30 to 12:10 | Session L5 An Experimental Study of Interconnection Length in 3D and 2D VLSI Prasun Ghosal, Hafizur Rahaman and Parthasarathi Dasgupta Piecewise Linear-based Hybrid Simulation of MOS and Single-Electron Circuits Arturo Sarmiento, Francisco Javier Castro, Luis Hernández-Martínez and Miguel Angel Gutiérrez. Optimized Large Size Signed Multipliers and Applications in FPGAs Shuli Gao, Dhamin Al-Khalili and Noureddine Chabini. A Parallel Architecture for Ray-Tracing for FPGA Implementation Alexandre Nery, Nadia Nedjah and Felipe M. G. França. Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment Mário Véstias, Hugo Santos and Helena Sarmento. Session L6 - DAC and Bio Applications Accurate Multi-bit Feedback DAC Dedicated to High-speed Continuous-time delta-sigma Converters Andre Mariano, Cédric Majek, Dominique Dallet, Yann Deval and Jean-Baptiste Begueret. A Short-Channel Silicon-Based Split-Drain MAGFET Measuring from 90 μT Gerard Santillan, Victos Champac and Roberto Murphy. How can Electrosurgical Sparks generate Undesirable Effects? Bertoldo Schneider Jr., Elton Dias Jr. and Paulo José Abatti. A Carbon Nanotube Spiking Cortical Neuron with Tunable Refractory Period and Spiking Duration Jonathan Joshi, Alice C. Parker and Chih-Chieh Hsu. Selectable Gain Amplifier for Inductive Sensor used to measure Human Motion Gustavo Theodoro Laskoski, Sérgio Francisco Pichorim and Paulo José Abatti. |
| 14:00 to 15:15 |
Embedded Tutorial 2: Integrated systems security: hardware-based threats and solutions Regis Leveugle - TIMA, France |
| 15:15 to 16:15 |
POSTER SECTION 2 Impact of different power reduction techniques at architectural level on modern FPGAs Henryk Błasiński, Frederic Amiel and Thomas Ea Master-Slave Flip-flop Optimization for fine-grained clock-gating Applications Javier Castro, Pilar Parra and Antonio Acosta. A new architecture for a FM modulator based on time-varying eigenvalues Miguel Angel Gutierrez de Anda, Arturo Sarmiento Reyes and Alfonso Prieto Guerrero. NOTIFY: a Network-On-chip-based Tool to Inject Faults extensivelY Hananeh Aliee and Hamid R. Zarandi. Source-Level Energy Estimation and Optimization of Embedded Software Carlo Brandolese, William Fornaciari and Daniele Scarpazza A Fuzzy Model for Network Traffic Prediction Using Orthonormal Basis Functions Based on Multifractal Characteristics Flávio H. T. Vieira, Flávio G. C. Rocha, Scheila G. Garcez and Christiane B. Santos. ASIC Implementation of a Parser Module for a Minimalist H.264 Video Decoder Leandro Silva, Fabio Pereira and Sergio Bampi. A Comparison of Steady-State Procedures Based on Epsilon-Algorithm and Sensitivity Analysis Josef Dobes, David Cerny, Viera Biolkova and Zdenek Kolka. Time-Stamp of Digital Audio Recording Based on the ENF Estimated from Another Audio Signal Isabela Apolinario and Carlos Rossi. Evaluating the Efficiency of Software-only Techniques to Detect SEU and SET in Microprocessors José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa and Fernanda Lima Kastensmidt. High Efficiency Reference Frames Storage for H.264/AVC Decoder Hardware Implementation Alexsandro C. Bonatto, Andre B. Soares and Altamiro A. Susin. A Study on Clock Mesh Size Selection Guilherme Flach, Gustavo Wilke, Marcelo Johann and Ricardo Reis. Cascode dynamic current calibration: A new scheme for implementation of highly accurate current memories Jaime Ramirez-Angulo, Enrique Lopez-Morillo, Ramon G. Carvajal and Antonio J. Lopez-Martin. |
| 16:15 - 17:40 | Session L7 Motion Vector Predictor Architecture for H.264/AVC Main Profile Targeting HDTV 1080p Franco Valdez, Bruno Zatt, Arnaldo Azevedo, Luciano Agostini and Sergio Bampi. A MIPS-based ASIP to Accelerate the Inverse Hadamard Tranform for H.264/AVC Video Coding Gracieli Posser, Guilherme Corrêa, Ricardo Reis, Luigi Carro and Sergio Bampi. Comparative Analysis of Parallel SAD Calculation Hardware Architectures for H.264/AVC Video Coding Cláudio Diniz, Guilherme Corrêa, Altamiro Susin and Sergio Bampi. Analysis of the Conditions for Worst Case Switching Activity in Integrated Circuits Carlos Sampaio, Jose Monteiro and L. Miguel Silveira. |
| 16:15 to 17:40 |
Special Session Biomedical Circuit & Systems Development of a Signal Acquisition Platform for Respiratory Assistance Antonio García Rozo, Diego Méndez Chávez, Lina Peñuela, Jaime Rivera and Jorge Torres Impact of parasitic capacitances on the performance of SAR ADCs based on capacitive arrays Alberto Rodríguez-Pérez, José A. Rodríguez, Fernando Medeiro and Manuel Delgado-Restituto A CMOS QFG ECG amplifier with baseline stabilization Antonio Lopez-Martin, Jaime Ramirez-Angulo, Ramon G. Carvajal Design of a versatile voltage based output stage for implantable neural stimulators Marijn N. van Dongen and Wouter A. Serdijn |
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Friday: February 26th |
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| 9:00 to 10:00 |
Ultra-low power logic circuits: From voltage-mode to current-mode Invited Talk: Massimo Alioto - Italy |
| 10:30 to 12:10 |
Session L8 Stepped Triangular CIC Decimation Filter for SDR Applications Gordana Jovanovic Dolecek and Alfonso Fernandez- Vazquez. On the Normalized Minimum Error-Entropy Adaptive Algorithm: Cost Function and Update Recursion Wallace Martins, Paulo Diniz and Yih-Fang Huang. Cross-Layer Constrained Power Management: Application to a Multimedia Mobile Platform William fornaciari, Patrick Bellasi, David Siorpaes, Stefano Bosisio and Matteo Carnevali. Delay Sensing for Parametric Variations and Defects Monitoring in Safety-Critical Applications Júlio Vazquez, Victor Champac, Adriel Ziesemer Jr., Ricardo Reis, Isabel Teixeira, Marcelino Santos and Paulo Teixeira Traffic Modeling and Analysis of PLC Networks using Markov Chains Christiane Borges Santos, Flávio Henrique Teles Vieira, Sergio Granato de Araújo, Fabio da Silva Marques, João Batista José Pereira, Flavio Geraldo C. Rocha and Dominique Carvalho Fernandes. Session L9 - Analog Circuits Design of a high-sensitivity sub-40ug capacitive accelerometer using a Multi-Project Wafer process André Keller Abadie and Roberto d'Amore. A Simple Approach for the Design of Operational Transconductance Amplifiers for Low Power Signal Processing Alfonso Chacón-Rodríguez, Santiago Sondon, Pablo Mandolesi and Pedro Julián. Offset-Compensated Comparator with Full-Input Range in 150nm FDSOI CMOS-3D Technology Manuel Suarez, Victor Brea, Carlos Domínguez, Ricardo Carmona, Gustavo Liñán and Angel Rodríguez Vázquez. A New Readout Circuit for Infrared Imaging Sensors Gholamreza Akbarizadeh and Gholam Ali Rezai-rad. Practical Considerations for the Design of Fully Differential OTAs with SC-CMFB Carlos Bula and Manuel Jimenez. |
| 14:00 to 15:15 |
Embedded Tutorial 3: Modeling Interconnect and Design-in Passives for Efficient Coupled Analysis Luis Miguel Silveira - INESC-ID, Portugal |
| 15:45 -17:25 |
Session L10 Cache Alternatives Concerning Cache Coherence in NoC-based MPSoC Platform Ivan Saraiva Silva, Bruno Cruz de Oliveira and Gustavo Girão. Grayscale CNN Computation of Boolean Functions Eero Lehtonen, Jussi Poikonen, Jonne Poikonen and Mika Laiho. A Study on the Propagation Times of Loaded CMOS Inverters Sergio Vale Pires, Manuel Dionisio Rolo, Ernesto Ventura Martins and Luis Nero Alves. Multi-Threaded Circuit Simulation using OpenMP Mark Zwolinski A Modified Izhikevich Model For Circuit Implementation of Spiking Neural Networks Arash Ahmadi and Mark Zwolinski. Session L11 Impact of Compilation Options on the Criticality of Registers in a Microprocessor-based System Salma Bergaoui and Regis Leveugle. A New Automated Instrumentation for Emulation-based Fault Injection Regis Leveugle and Adrien Prost-Boucle. Performance Evaluation of Hybrid ANN Based Time Series Prediction on Embedded Processor Rafael Trapani Possignolo and Omar Hamammi. Design and Simulation of a Unit Cell for a QWIP-FPA Lester de Abreu Faria, Fabio Durante Pereira Alves and Newton Gomes. |
| 17:55 | Closing |