Defesa de Tese de Doutorado em Arquitetura e Projeto de Sistemas Computacionais

UNIVERSIDADE FEDERAL DO RIO GRANDE DO SUL
INSTITUTO DE INFORMÁTICA
PROGRAMA DE PÓS-GRADUAÇÃO EM COMPUTAÇÃO

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DEFESA DE TESE DE DOUTORADO

Aluno: Débora da Silva Motta Matos

Orientador: Prof. Dr. Altamiro Amadeu Susin

Coorientador: Prof. Dr. Luigi Carro

Título: Exploring Hierarchy, Adaptability and 3D in NoCs for the Next Generation of MPSoCs

Linha de Pesquisa: Arquitetura e Projeto de Sistemas Computacionais

Data: 20/12/2013

Horário: 9h

Local: Prédio 43412 – sala 215 (Sala de Vídeo Conferência)

Banca Examinadora:

Prof. Dr. Cesar Albenes Zeferino (UNIVALE)

Profa. Dra. Monica Magalhães Pereira (UFRN)

Prof. Dr. Flávio Rech Wagner (UFRGS)

Presidente da Banca: Prof. Dr. Altamiro Amadeu Susin

Resumo:

The demand for systems with high performance has brought the need to increase the number of cores, emerging the called Multi-Processors System-on-Chip (MPSoCs). Also, with the shrinking feature size in deep-submicron era, allowing the integration of several devices, chips have become even more complex. However, with the increase in these elements, interconnections are seen as the main bottleneck in manycore systems-on-chip. With this, a concern about how these devices communicate and are interconnected has been raised, since these features are crucial for the performance, energy and power consumption aspects, mainly in embedded systems. This need allows the advent of the Networks-on-Chip (NoCs) and countless studies had already been done to analyze such interconnection devices. However, due to the current technological accelerating that brings the need for even more complex systems, consuming lower energy and providing constant application updates without losing performance features, traditional interconnect architectures will not be sufficient to satisfy such challenges. Other interconnecting alternatives need to be investigated and in this work, novel architectures for NoCs attending such requirements are presented. The proposed solutions explore hierarchy, adaptability and three dimensional interconnections. This work approaches the requirements in the use of different strategies for NoCs in order to reach the performance requisites and low power consumption of the current and future MPSoCs. Hence, in this approach, several interconnection architectures for heterogeneous systems, their scalability and the main features and advantages of the proposed strategies in comparison with others will be verified.

Palavras-chave: Network-on-chip, hierarchical topology, crossbar, adaptability, switching, 3D designs, 3D interconnects.