Proposta de Tese em Sistemas Embarcados

Contato

Publicado em: 22/11/2013

UNIVERSIDADE FEDERAL DO RIO GRANDE DO SUL

INSTITUTO DE INFORMÁTICA

PROGRAMA DE PÓS-GRADUAÇÃO EM COMPUTAÇÃO

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DEFESA DE PROPOSTA DE TESE

Aluno: Gustavo Girão Barreto da Silva

Orientador: Prof. Dr. Flávio Rech Wagner

Título: Resource-Aware Clustering Design for NoC-based MPSoCs

Linha de Pesquisa: Sistemas Embarcados

Data: 28/11/2013

Horário: 13h

Local: Sala 220 (conselhos). Prédio 43412 – Instituto de Informática

Banca Examinadora:

Prof. Dr. Altamiro Amadeu Susin (UFRGS)

Prof. Dr. Antônio Carlos Schneider Beck Filho (UFRGS)

Prof. Dr. Ivan Saraiva Silva (UFPI)

Presidente da Banca: Prof. Dr. Flávio Rech Wagner

Resumo:

The multicore paradigm is a solid trend nowadays, also in the field of embedded systems. The degree of parallelism provided by such architecture has been the foundation of performance advancements in the field as well as for power and energy savings. However, to obtain efficient parallelism of such architecture is not an easy task. Therefore, developers come up with several proposals of programming environments trying to provide as much transparency as possible. On the hardware side, this increasing number of on-chip components creates a management issue to be handled. In the context of this complex scenario this thesis proposes the use of resource management approaches to improve the efficiency, regarding both performance and energy consumption, of MPSoC environments at different levels. Also, these approaches have in common the notion of clustering, which tries to logically aggregate resources according to application demands. First, at the processor/application level, we propose a dynamically adaptable hardware to support distinct parallel programming models at no computational overhead, since the entire process is completely transparent to the programmer. Also, in this environment, where distinct applications can be executed, we propose a resource-aware scheduling mechanism to improve performance named Processor Clustering. We propose four different resource mapping policies that leverage on distinct aspects of the parallel nature of the applications and on architecture constraints. However, some applications have higher memory demands than computational demands. Therefore, a similar approach can be used at the memory level. In this case, we aim at redistributing memory resources according to application demands. We explore memory redistribution at both design time and runtime and propose a distribution mapping mechanism based on the amount of off-chip memory requests. Finally, we propose a resource-aware fault-tolerance mechanism for distributed on-chip memories in NoCs. We introduce a Reliability Clustering model that leverages on the NoC infrastructure. In this case, the routers have knowledge of faulty blocks and redundancy blocks and, based on that, they are able to avoid higher memory access latency.

Palavras-chave: Multiprocessors, Networks-on-Chip, Cluster, Task Mapping, Resource Management, Parallel Programming, Reliability.

UNIVERSIDADE FEDERAL DO RIO GRANDE DO SUL
INSTITUTO DE INFORMÁTICA
PROGRAMA DE PÓS-GRADUAÇÃO EM COMPUTAÇÃO
———————————————-
DEFESA DE PROPOSTA DE TESE

Aluno: Gustavo Girão Barreto da Silva
Orientador: Prof. Dr. Flávio Rech Wagner

Título: Resource-Aware Clustering Design for NoC-based MPSoCs
Linha de Pesquisa: Sistemas Embarcados

Data: 28/11/2013Horário: 13h
Local: Sala 220 (conselhos). Prédio 43412 – Instituto de Informática

Banca Examinadora:
Prof. Dr. Altamiro Amadeu Susin (UFRGS)
Prof. Dr. Antônio Carlos Schneider Beck Filho (UFRGS)
Prof. Dr. Ivan Saraiva Silva (UFPI)
Presidente da Banca: Prof. Dr. Flávio Rech Wagner

Resumo:
The multicore paradigm is a solid trend nowadays, also in the field of embedded systems. The degree of parallelism provided by such architecture has been the foundation of performance advancements in the field as well as for power and energy savings. However, to obtain efficient parallelism of such architecture is not an easy task. Therefore, developers come up with several proposals of programming environments trying to provide as much transparency as possible. On the hardware side, this increasing number of on-chip components creates a management issue to be handled. In the context of this complex scenario this thesis proposes the use of resource management approaches to improve the efficiency, regarding both performance and energy consumption, of MPSoC environments at different levels. Also, these approaches have in common the notion of clustering, which tries to logically aggregate resources according to application demands. First, at the processor/application level, we propose a dynamically adaptable hardware to support distinct parallel programming models at no computational overhead, since the entire process is completely transparent to the programmer. Also, in this environment, where distinct applications can be executed, we propose a resource-aware scheduling mechanism to improve performance named Processor Clustering. We propose four different resource mapping policies that leverage on distinct aspects of the parallel nature of the applications and on architecture constraints. However, some applications have higher memory demands than computational demands. Therefore, a similar approach can be used at the memory level. In this case, we aim at redistributing memory resources according to application demands. We explore memory redistribution at both design time and runtime and propose a distribution mapping mechanism based on the amount of off-chip memory requests. Finally, we propose a resource-aware fault-tolerance mechanism for distributed on-chip memories in NoCs. We introduce a Reliability Clustering model that leverages on the NoC infrastructure. In this case, the routers have knowledge of faulty blocks and redundancy blocks and, based on that, they are able to avoid higher memory access latency.

Palavras-chave: Multiprocessors, Networks-on-Chip, Cluster, Task Mapping, Resource Management, Parallel Programming, Reliability.