Publicado em: 10/03/2025

Prof. Reis no IEEE LATS 2025

Prof. Ricardo Reis é Keynote Speaker do LATS 2025

Prof. Ricardo Reis é Keynote Speaker do IEEE LATS 2025
26th IEEE Latin American Test Symposium 2025
San Andrés, Colombia
March 11-14, 2025
Palestra: Trends on Reliability of SoCs
A participação do prof. Reis é no contexto do Distinguished Lecturer Program da IEEE Council on EDA

Abstract:
Systems on Chips includes more and more components and demands several actions to improve reliability. The scaling of CMOS technology to nanometer scale dimensions inevitability increases reliability concerns, profoundly impacting all aspects of circuit performance and posing several challenges in the IC design. These reliability concerns arise from many different sources, and become more severe with continuous scaling. It is needed to consider power consumption issues and how to reduce power consumption as reliability is related to. It is needed EDA tools that can help to distribute the power consumption in all chip floorplanning. Electromigration is another issue to take care about, by applying some design techniques to cope with it. The effects of radiation are also increasing due to the transistor scaling down, and is more and more mandatory the use of design techniques to cope with this issue. It is important to consider reliability issues in all design abstraction levels. Some of the design techniques to improve reliability will be presented, mainly at circuit design and physical design levels. The impact on reliability of transistor count and transistor arrangements will be presented.