O Prof. Ricardo Reis irá participar do IEEE Computer Society Annual Symposium on VLSI – ISVLSI 2025.
No dia 8 de julho, em Kal, Grécia, ele ministrará o tutorial “Trends and Challenges on EDA”.
Abstract: the design quality of modern chips depends on the quality of the EDA tools used in the design flow. With the evolution of nanotechnologies new EDA tools are needed. Some trends and Challenges on EDA to cope with the evolution of manufacturing processes will be presented. An important set of EDA tools nowadays are the ones to reduce power consumption at all levels of design abstraction. Power Optimization is fundamental in the IoT world. At logic and physical level, it is needed to reduce the transistor count to reduce leakage power. Also, the use of estimation tools dedicated to each design level and visualization tools are more and more important in modern design flows.
Ele também irá participar da reunião do Steering Committee 2026, que acontecerá em Kolkata, na Índia.
🔗 Confira mais sobre o evento em: www.ieee-isvlsi.org