Publicado em: 23/08/2010

Robust Clock Tree Synthesis com o prof. Matthew Guthaus

Hoje, 23/08, às 15h30min,  no Auditório Prof. José Mauro Volkmer de Castilho, acontece a palestra com o prof. Matthew Guthaus da UC Santa Cruz, California, USA.

This talk will introduce clock network synthesis algorithms for power and robustness. Overviews of research in clock topology, routing, buffering and tuning will be described. In addition, recent research on the reduction of parametric variations will be described.

Biography:

Matthew is currently an Assistant Professor at the University of California Santa Cruz in Computer Engineering. He received his BSE in Computer Engineering and MSE and PhD in Electrical Engineering from The University of Michigan (UM).  His research interests are in VLSI physical design (clock distribution, transistor sizing, and buffer insertion), design for variability and reliability (temperature, manufacturing variation, single event upsets) and custom hardware. In addition to academic research, Matthew has also worked with several major semiconductor companies including National Semiconductor Corporation and IBM at T.J. Watson Research Center.

OBS: Ele ficará em Porto Alegre até o dia 29 de Agosto e durante este periodo tem a intenção de estabelecer cooperações com diferentes grupos de pesquisa, pesquisadores e alunos da nossa universidade.