Technical Program


Program Schedule


Wednesday Sept. 17 Thursday Sept. 18 Friday Sept. 19
   
08:45 Keynote
From circuits to cancer
09:00 Opening
09:15 Keynote
“Soft specifications” -  The most economical approach to mixed-signal design and testing
Embedded Tutorial
Self-testing: key to future dependable mixed-signal integrated systems
09:30 Session 3
Fault Modeling and ATPG for Analog and Mixed-Signal Circuits
09:45
10:00 Break Break
10:15
10:30 Session 1
Timing and Phase Noise Measurement
Break Session 5
Radiation Effects and Fault Tolerance
10:45
11:00 Session 4
Built-In Self-Test
11:15
11:30
11:45
12:00 Lunch Lunch Lunch
12:30
13:00
13:30 Special Session 1
Memristors: fabrication challenges, memory application, and neural network implementation
Special Session 2
Networks on Chip in Emerging Interconnect Paradigms
Session 6
Metal Corrosion Test, Real-Time Compensation and Adaptive Tuning
13:45
14:00
14:15
14:30 Session 2
Mixed-Signal Test Infrastructure
14:45
15:00 Break Closing Remarks
15:15
15:30 Break  
15:45
16:00 Panel
Trends in mixed-signal test cost in current and future ICs
Social Program
16:15
16:30
16:45
17:00
17:15
 
19:00 Welcome Cocktail
20:00  


Program


Wednesday September 17
   
9:00 - 9:15 Opening
Welcome Address
Marcelo Lubaszewski (CEITEC-SA, BR) - IMS3TW'14 General Chair
Program Introduction
Florence Azais (LIRMM, FR) - IMS3TW'14 Program Chair
 
9:15 - 10:00 KEYNOTE
  Chair: Haralampos-G. Stratigopoulos (TIMA, FR)
“Soft Specifications” -  The Most Economical Approach to Mixed-Signal Design and Testing
Oren Eliezer (CTO EverSet Technologies, US)
   
10:00 - 10:30 Break
   
10:30 - 12:00 SESSION 1
  Timing and Phase Noise Measurement
  Chair: Jose Machado da Silva (Univ. do Porto, PT)
1,1 Experimental Verification of Timing Measurement Circuit With Self-Calibration
Takeshi Chujo (Gunma University, JP), Daiki Hirabayashi (Gunma University, JP), Kentaroh Katoh (Tsuruoka National College of Technology, JP), Congbing Li (Gunma University, JP), Yutaro Kobayashi (Gunma University, JP), Junshan Wang (Gunma University, JP), Koshi Sato (Hikari Science, JP), Haruo Kobayashi (Gunma University, JP)
1,2 Phase Noise Measurement Techniques Using Delta-Sigma TDC
Yusuke Osawa (Gunma University, JP), Daiki Hirabayashi (Gunma University, JP), Naohiro Harigai (Gunma University, JP), Haruo Kobayashi (Gunma University, JP), Kiichi Niitsu (Nagoya University, JP), Osamu Kobayashi (STARC, JP)
1,3 Stochastic model for phase noise measurement from 1-bit signal acquisition
Stephane David-Grignot (LIRMM/NXP, FR), Florence Azais, (LIRMM, FR), Laurent Latorre (LIRMM, FR), Francois Lefevre (NXP Semiconductors, FR)
   
12:00 - 13:30 Lunch
   
13:30 - 14:30 SPECIAL SESSION 1
  Memristors: fabrication challenges, memory application, and neural network implementation
  Organizer: Amirali Ghofrani (UCSB, USA)
  Moderator: Gilberto Medeiros (UFMG, BR)
S1.1 Monolithically Integrated Memristor/CMOS Hybrid Circuits
  Qiangfei Xia (U. of Massachusetts, USA), Peng Lin (U. of Massachusetts, USA), Miguel Lastras (UCSB, USA), Amirali Ghofrani (UCSB, USA), Hao Jiang(U. of Massachusetts, USA), Melika Payvand (UCSB, USA), Luke Theogarajan (UCSB, USA), K.-T. Tim Cheng (UCSB, USA)
S1.2 A progress update on memristor-based pattern classifiers
  Mirko Prezioso (UCSB, USA), Farnood Merrikh-Bayat (UCSB, USA), Brian Hoskins (UCSB, USA), Gina Adam (UCSB, USA), Dmitri Strukov Mirko (UCSB, USA)
 
14:30 - 15:30 SESSION 2
  Mixed-Signal Test Infrastructure
  Chair: Carsten Wegener (Dialog Semiconductor, DE)
2,1 An I2C Based Mixed-Signal Test and Measurement Infrastructure
Antonio Salazar (Univ. do Porto, PT), Jose Machado da Silva (Univ. do Porto, PT), Miguel Velhote Correia (Univ. do Porto, PT)
2,2 Low cost test architecture for mixed-signal integrated circuits
Julio da Silva Jr. (CEITEC, BR), Emerson R. Camargo (CEITEC, BR), Douglas Foster (CEITEC, BR), Sandro T. Coelho (CEITEC, BR), Antonio A. G. de Oliveira (CEITEC, BR), Alfredo Olmos (CEITEC, BR), Marcelo Lubaszewski (CEITEC, BR)
   
15:30 - 16:00 Break
   
16:30 - 17:30 PANEL
  Trends in mixed-signal test cost in current and future ICs
  Organizer: Andre Ivanov (UBC, CA)
  Moderator: Salvador Mir (TIMA, FR)
Panelists:
Haruo Kobayashi (Gunma University, JP)
Oren Eliezer (CTO EverSet Technologies, US)
Michel Renovell (LIRMM, FR)
Eric Lee (HTMicron, BR)
Alfredo Olmos (CEITEC, BR)
   
19:00 Welcome Cocktail


Thursday September 18
   
8:45 - 9:30 KEYNOTE
  Chair: Hans Kerhoff (University of Twente, NL)
"From Circuits to Cancer"
Sani Nassif (CEO Radyalis, USA)
 
9:30 - 10:30 SESSION 3
  Fault Modeling and ATPG for Analog and Mixed-Signal Circuits
  Chair: Fabian Vargas (PUCRS, BR)
3,1 The Influence of No Faults Found in Analogue CMOS Circuits
Hans Kerhoff (University of Twente, NL)
3,2 ATPG for Mixed-signal Circuits Using Commercial Digital Tools
Carsten Wegener (Dialog Semiconductor, DE)
   
10:30 - 11:00 Break
   
11:00 - 12:00 SESSION 4
  Built-In Self-Test
  Chair: Eric Fabris (UFRGS)
4,1 Non-Intrusive Built-In Test for 65nm RF LNA
Athanasios Dimakos (TIMA, FR), Haralampos-G. Stratigopoulos (TIMA, FR), Alexandre Siligaris (CEA-LETI, FR), Emeric De Foucauld (CEA-LETI, FR), Salvador Mir (TIMA, FR)
4,2 Low Cost Implicit Built-In Self-Test of Passive RFID Tags
Suvadeep Banerjee (Georgia Tech, US), Aritra Banerjee (Georgia Tech, US), Debashis Banerjee (Georgia Tech, US), Kyujeong Lee (Samsung Electronics, KR), Abhijit Chatterjee (Georgia Tech, US)
   
12:00 - 13:30 Lunch
   
13:30 - 15:00 SPECIAL SESSION 2
  Networks on Chip in Emerging Interconnect Paradigms
  Organizer: Partha Pande (Washington State University, USA)
  Moderator: Alexandre Amory (PUCRS, BR)
S2.1 Integrated Cross-Layer Solutions for Enabling Silicon Photonics into Future Chip Multiprocessors
  Paolo Grani (Univ. of Siena, IT), Luca Ramini (Univ. of Ferrara, IT), Davide Bertozzi (Univ. of Ferrara, IT), Sandro Bartolini (University of Siena, IT)
S2.2 Elevator-First: a NoC routing strategy to cope with TSV Costs and Topology Heterogeneity of 3D-Integration
  Hamed Sheibanyrad (LIP6 Lab, FR)
S2.3 System-Level Design Space Exploration for SoCs Integrating Optical Networks on Chip
  F. Hessel (PUCRS, BR), G. Nicolescu (Ecole Polytechnique de Montreal, CA), F. Gohring de Magalhães (Ecole Polytechnique Montreal, CA), O. Liboiron-Ladouceur (Mc Gill University, CA)
   
15:00 - 15:30 Break
   
16:00 Social Program


Friday September 19
   
9:15 - 10:00 EMBEDDED TUTORIAL
  Chair: Jacob Abraham (University of Texas, USA)
"Self-testing: key to future dependable mixed-signal integrated systems"
Hans Kerhoff (University of Twente, NL)
   
10:00 - 10:30 Break
   
10:30 - 12:00 SESSION 5
  Radiation Effects and Fault Tolerance
  Chair: Fernanda Kastensmidt (UFRGS, BR)
5,1 Fault Mitigation Strategies for Single Event Transients on SAR converters
Alisson Lanot (UFRGS, BR), Tiago Balen (UFRGS, BR)
5,2 Alternate Biasing Modular Redundancy: an alternative tolerance technique to cope with TID effects
Tiago Balen (UFRGS, BR), Rafael Galhardo Vaz (Instituto de Estudos Avançados, BR), Gustavo Fernandes (UFRGS, BR), Ederson Machado (UFRGS, BR), Odair Gonçalez (Instituto de Estudos Avançados, BR)
5,3 Measuring the Impact of Voltage Scaling for Soft Errors in SRAM-based FPGAs from a Designer Perspective
Jorge Tonfat Seclen (UFRGS, BR), Jose Rodrigo Azambuja (FURG, BR), Gabriel Nazar (UFRGS, BR), Paolo Rech (UFRGS, BR), Luigi Carro (UFRGS, BR), Ricardo Reis (UFRGS, BR), Fernanda Kastensmidt (UFRGS, BR), Fabian Vargas (PUCRS, BR), Eduardo Bezerra (UFSC, BR), Christopher Frost (ISIS, GB)
   
12:00 - 13:30 Lunch
   
13:30 - 15:00 SESSION 6
  Metal Corrosion Test, Real-Time Compensation and Adaptive Tuning
  Chair: Michel Renovell (LIRMM, FR)
6,1 A Simple Electro-Chemical Test and Optimization System for Impressed Current Cathodic Corrosion Protection
Andre Chang (SFU, CA), Jasbir Pate (SFU, CA)l, Bozena Kaminska (SFU, CA)
6,2 Real-Time Correction of DC Motor and Controller Failures Using Analog Checksums
Suvadeep Banerjee (Georgia Tech, US), Abhijit Chatterjee (Georgia Tech, US), Jacob Abraham (University of Texas, US)
6,3 Study of Adaptive Tuning Strategies for NFC Transmitter Module
Mouhamadou Dieng (LIRMM/NXP, FR), Florence Azais (LIRMM, FR), Mariane Comte (LIRMM, FR), Serge Bernard (LIRMM, FR), Vincent Kerzerho (LIRMM, FR), Michel Renovell (LIRMM, FR), Thibault Kervaon (NXP Semiconductors, FR), Paul-Henri Pugliesi-Conti (NXP Semiconductors, FR)
 
15:00 -15:15 Closing Remarks




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