| HORÁRIO | SEG (29/04/13) | TER (30/04/13) |
| 08:00 - 08:30 | Abertura | |
| 08:30 - 09:00 | Palestra Convidada 1 | Palestra Convidada 5 |
| 09:00 - 10:00 | Sessão Técnica 1 | Sessão Técnica 5 |
| 10:00 - 10:30 | Coffe Break | Coffe Break |
| 10:30 - 11:00 | Palestra Convidada 2 | Palestra Convidada 6 |
| 11:00 - 12:10 | Sessão Técnica 2 | Sessão Técnica 6 |
| 12:10 - 14:00 | Almoço | Almoço |
| 14:00 - 14:30 | Palestra Convidada 3 | Palestra Convidada 7 |
| 14:30 - 15:40 | Sessão Técnica 3 | Sessão Técnica 7 |
| 15:40 - 16:00 | Coffe Break | Coffe Break |
| 16:00 - 16:30 | Palestra Convidada 4 | Palestra Convidada 8 |
| 16:30 - 17:50 | Sessão Técnica 4 | Sessão Técnica 8 |
| 17:50 - 18:00 | Encerramento | |
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Para acessar o artigo ou a apresentação clique em cima da seção correspondente.
29/04 - SEGUNDA
Session 1: Analog Design I
Photoluminescence from Tb nanoparticles embedded into SiO2 films at high temperature
Franciele Nornberg, Felipe Lipp Bregolin and Uilson S. Sias
Application of gm/ID Methodology for Analog Design Using Nanometer-Scale Devices
Tanísia Possani, Luiz Roberto Pavanato, Luiz Antonio. Da Silva Jr. and Alessandro Girardi
Parallel Characterization of Operational Amplifiers for Acceleration of Design Optimization
Arthur Campos de Oliveira, Lucas Compassi Severo and Alessandro Gonçalves Girardi
Analog Acquisition Using Multilevel Statistical Sampling
Adão Souza Jr, Gabriel Guimarães and William Marques
Power Consumption Analysis in CMOS Static Gates
Alberto Wiltgen Junior, Kim Aragon Escobar, André I. Reis and Renato Perez Ribas
Franciele Nornberg, Felipe Lipp Bregolin and Uilson S. Sias
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Artigo | |
Apresentação |
Application of gm/ID Methodology for Analog Design Using Nanometer-Scale Devices
Tanísia Possani, Luiz Roberto Pavanato, Luiz Antonio. Da Silva Jr. and Alessandro Girardi
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Artigo | |
Apresentação |
Parallel Characterization of Operational Amplifiers for Acceleration of Design Optimization
Arthur Campos de Oliveira, Lucas Compassi Severo and Alessandro Gonçalves Girardi
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Artigo | |
Apresentação |
Analog Acquisition Using Multilevel Statistical Sampling
Adão Souza Jr, Gabriel Guimarães and William Marques
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Artigo | |
Apresentação |
Power Consumption Analysis in CMOS Static Gates
Alberto Wiltgen Junior, Kim Aragon Escobar, André I. Reis and Renato Perez Ribas
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Artigo | |
Apresentação |
Session 2: Systems Design I
Multi-level Stochastic Processing Circuits
Adão Souza Jr, Pietro Konzgen and William Marques
Signal Pre-Processing to Increase DPA Success on GALS Architectures
Marcelo Fay, Luciano Loder, Adão Souza Jr and Rafael Soares
Automatic Generation of Co-Processor for Simulation of Quantum Algorithms on FPGA
Calebe Conceicao and Ricardo Reis
FPGA Prototyping and Validation of an EPC Gen 2 RFID Tag
Lauro Puricelli, Herbert Peralta and Robert Torrel
A VLSI Architecture for Reference Frame Compression on High Definition Video Coding Systems
Dieison Silveira, Guilherme Povala, Lívia Amaral, Júlio Carlos de Mattos, Marcelo Porto and Luciano Agostini
A Hardware Solution for the HEVC Fractional Motion Estimation Interpolation
Henrique Maich, Vladimir Afonso, Denis Franco, Marcelo Porto and Luciano Agostini
Hardware Design for a Reference Frame Compression Technique for Multiview Video Coding
Rafael Justo, Felipe Sampaio and Sergio Bampi
Adão Souza Jr, Pietro Konzgen and William Marques
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Artigo | |
Apresentação |
Signal Pre-Processing to Increase DPA Success on GALS Architectures
Marcelo Fay, Luciano Loder, Adão Souza Jr and Rafael Soares
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Artigo | |
Apresentação |
Automatic Generation of Co-Processor for Simulation of Quantum Algorithms on FPGA
Calebe Conceicao and Ricardo Reis
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Artigo | |
Apresentação |
FPGA Prototyping and Validation of an EPC Gen 2 RFID Tag
Lauro Puricelli, Herbert Peralta and Robert Torrel
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Artigo | |
Apresentação |
A VLSI Architecture for Reference Frame Compression on High Definition Video Coding Systems
Dieison Silveira, Guilherme Povala, Lívia Amaral, Júlio Carlos de Mattos, Marcelo Porto and Luciano Agostini
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Artigo | |
Apresentação |
A Hardware Solution for the HEVC Fractional Motion Estimation Interpolation
Henrique Maich, Vladimir Afonso, Denis Franco, Marcelo Porto and Luciano Agostini
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Artigo | |
Apresentação |
Hardware Design for a Reference Frame Compression Technique for Multiview Video Coding
Rafael Justo, Felipe Sampaio and Sergio Bampi
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Apresentação |
Session 3: Digital Design I
A New Algorithm to Implement Combinational Logic Cells with Reduced Number of Switches
Vinicius Possani, Vinicius Callegaro, Andre Reis, Renato Ribas, Felipe Marques and Leomar Da Rosa Junior
An Efficient Method to Threshold Logic Functions Identification
Augusto Silva, Mayler Martins, Renato Ribas and Andre Reis
Global Routing Congestion Reduction with Cost Calibration Look-ahead
Leandro De Morais Nunes and Ricardo Augusto Da Luz Reis
A graph-based algorithm for synthesis of read-polarity-once functions
Vinicius Callegaro, Mayler Martins, Renato Ribas and Andre Reis
Majority-based Library Generation for Nanometric Technologies
Mayler Martins, Vinicius Callegaro, Stèphano Gonçalves, Melissa Colvara, Felipe S. Marques, Leomar Rosa Jr, Renato Ribas and Andre Reis
P-matching method based on bipartite graph
Anderson Santos Da Silva, Renato Ribas and Andre Reis
Using Genetic Algorithm in Functional Verification to reach high level functional coverage
Adriana Brito, Karina Da Silva and Ricardo Franco
Vinicius Possani, Vinicius Callegaro, Andre Reis, Renato Ribas, Felipe Marques and Leomar Da Rosa Junior
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Artigo | |
Apresentação |
An Efficient Method to Threshold Logic Functions Identification
Augusto Silva, Mayler Martins, Renato Ribas and Andre Reis
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Artigo | |
Apresentação |
Global Routing Congestion Reduction with Cost Calibration Look-ahead
Leandro De Morais Nunes and Ricardo Augusto Da Luz Reis
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Artigo | |
Apresentação |
A graph-based algorithm for synthesis of read-polarity-once functions
Vinicius Callegaro, Mayler Martins, Renato Ribas and Andre Reis
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Artigo | |
Apresentação |
Majority-based Library Generation for Nanometric Technologies
Mayler Martins, Vinicius Callegaro, Stèphano Gonçalves, Melissa Colvara, Felipe S. Marques, Leomar Rosa Jr, Renato Ribas and Andre Reis
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Artigo | |
Apresentação |
P-matching method based on bipartite graph
Anderson Santos Da Silva, Renato Ribas and Andre Reis
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Artigo | |
Apresentação |
Using Genetic Algorithm in Functional Verification to reach high level functional coverage
Adriana Brito, Karina Da Silva and Ricardo Franco
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Artigo | |
Apresentação |
Session 4: Systems Design II
Evaluating Application Performance Between Digital Signal Processor and General Purpose Processor Using Reconfigurable Hardware
Eduardo Nicola, Júlio Ruzicki, Luis Jeske and Júlio Carlos Balzano Mattos
Generation and Analysis of Android Benchmarks with Different Algorithm Design Paradigms
Andrws Aires Vieira, Cristian Maruan Bosin, Luciano Volcan Agostini, Felipe S. Marques and Julio C. B. Mattos
Runtime Fault Recovery Protocol for NoC-based MPSoCs
Eduardo W. Wächter, Leonardo R. Juracy, Walter L. Neto, Alexandre M. Amory and Fernando G. Moraes
Distributed Resource Management in NoC-Based MPSoCs with Dynamic Cluster Sizes
Guilherme Machado de Castilhos, Guilherme Madalozzo, Marcelo Mandelli and Fernando Moraes
Acceleration Techniques for Motion Estimation Algorithms Using Parallel and Distributed Computing
Jonas C Meinerz, Eduarda R Monteiro, Felipe M Sampaio, Altamiro A Susin and Sergio Bampi
Hardware Architecture for Motion Estimation on Chrominance Samples
Gustavo Wrege, Ruhan Conceição, Marcelo Porto and Luciano Agostini
Design of an 8 Points 1-D IDCT of the Emerging HEVC Video Coding Standard
José Cláudio de Souza Júnior, Ruhan Conceição, Ricardo Jeske, Luciano Volcan Agostini and Julio C. B. Mattos
Eduardo Nicola, Júlio Ruzicki, Luis Jeske and Júlio Carlos Balzano Mattos
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Artigo | |
Apresentação |
Generation and Analysis of Android Benchmarks with Different Algorithm Design Paradigms
Andrws Aires Vieira, Cristian Maruan Bosin, Luciano Volcan Agostini, Felipe S. Marques and Julio C. B. Mattos
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Artigo | |
Apresentação |
Runtime Fault Recovery Protocol for NoC-based MPSoCs
Eduardo W. Wächter, Leonardo R. Juracy, Walter L. Neto, Alexandre M. Amory and Fernando G. Moraes
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Artigo | |
Apresentação |
Distributed Resource Management in NoC-Based MPSoCs with Dynamic Cluster Sizes
Guilherme Machado de Castilhos, Guilherme Madalozzo, Marcelo Mandelli and Fernando Moraes
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Artigo | |
Apresentação |
Acceleration Techniques for Motion Estimation Algorithms Using Parallel and Distributed Computing
Jonas C Meinerz, Eduarda R Monteiro, Felipe M Sampaio, Altamiro A Susin and Sergio Bampi
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Artigo | |
Apresentação |
Hardware Architecture for Motion Estimation on Chrominance Samples
Gustavo Wrege, Ruhan Conceição, Marcelo Porto and Luciano Agostini
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Artigo | |
Apresentação |
Design of an 8 Points 1-D IDCT of the Emerging HEVC Video Coding Standard
José Cláudio de Souza Júnior, Ruhan Conceição, Ricardo Jeske, Luciano Volcan Agostini and Julio C. B. Mattos
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Apresentação |
30/04 - TERÇA
Session 5: Analog Design II
Theoretical Specification of a Spectrum Sensing Receiver for Cognitive Radio
Filipe Baumgratz, Sandro Ferreira and Sergio Bampi
System Design Considerations for an Analog Frontend Receiver in Cognitive Radio Applications
Sandro Ferreira, Filipe Baumgratz and Sérgio Bampi
A 2.4 GHz Fully-Integrated CMOS Class-AB Power Amplifier
Mateus Moreira and Fernando de Sousa
Near-Threshold Notch Filter with Pole-Radius Variation
Kleber Stangherlin, Leonardo Soares and Sergio Bampi
A Survey of Wideband Low Noise Amplifiers Design Techniques for Cognitive Radio
Arthur Liraneto Torres Costa, Hamilton Klimach and Sergio Bampi
A Resistorless Switched Bandgap Reference
Hamilton Klimach, Moacir Fernandes Cortinhas Monteiro, Arthur Liraneto Torres Costa and Sergio Bampi
Filipe Baumgratz, Sandro Ferreira and Sergio Bampi
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Apresentação |
System Design Considerations for an Analog Frontend Receiver in Cognitive Radio Applications
Sandro Ferreira, Filipe Baumgratz and Sérgio Bampi
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Artigo | |
Apresentação |
A 2.4 GHz Fully-Integrated CMOS Class-AB Power Amplifier
Mateus Moreira and Fernando de Sousa
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Artigo | |
Apresentação |
Near-Threshold Notch Filter with Pole-Radius Variation
Kleber Stangherlin, Leonardo Soares and Sergio Bampi
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Artigo | |
Apresentação |
A Survey of Wideband Low Noise Amplifiers Design Techniques for Cognitive Radio
Arthur Liraneto Torres Costa, Hamilton Klimach and Sergio Bampi
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Artigo | |
Apresentação |
A Resistorless Switched Bandgap Reference
Hamilton Klimach, Moacir Fernandes Cortinhas Monteiro, Arthur Liraneto Torres Costa and Sergio Bampi
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Apresentação |
Session 6: Systems Design III
Design of a synthesizable processor didactic in FPGA
Fernanda Mota, Bruno Leonardo and Vagner Rosa
Evaluating Android best practices for performance
Aline Rodrigues Tonini, Marco Beckmann, Julio C. B. de Mattos and Lisane Brisolara de Brisolara
Extensible Communication Interface to SoCIN Network-on-Chip
Douglas Melo, Michelle Wangham and Cesar Zeferino
Implementing Fault Tolerance Mechanismis to Protect a Network-on-Chip against Single Event Upset Faults
Thiago Felski Pereira and Cesar Albenes Zeferino
Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding
Felipe Sampaio, Bruno Zatt, Luciano Agostini and Sergio Bampi
An architecture for the new Adaptive Loop Filter of the High Efficiency Video Coding
Victor Renan Covalski Junes, Fabiane Rediess, Pargles Dall'Oglio, Marcelo Porto and Luciano Volcan Agostini
Hardware-Friendly Motion Estimation Algorithms and its Architectures for High Definition Videos
Mario Saldanha, Gabriel Balota, Gustavo Sanchez, Luciano Agostini and Marcelo Porto
Fernanda Mota, Bruno Leonardo and Vagner Rosa
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Artigo | |
Apresentação |
Evaluating Android best practices for performance
Aline Rodrigues Tonini, Marco Beckmann, Julio C. B. de Mattos and Lisane Brisolara de Brisolara
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Artigo | |
Apresentação |
Extensible Communication Interface to SoCIN Network-on-Chip
Douglas Melo, Michelle Wangham and Cesar Zeferino
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Artigo | |
Apresentação |
Implementing Fault Tolerance Mechanismis to Protect a Network-on-Chip against Single Event Upset Faults
Thiago Felski Pereira and Cesar Albenes Zeferino
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Artigo | |
Apresentação |
Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding
Felipe Sampaio, Bruno Zatt, Luciano Agostini and Sergio Bampi
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Artigo | |
Apresentação |
An architecture for the new Adaptive Loop Filter of the High Efficiency Video Coding
Victor Renan Covalski Junes, Fabiane Rediess, Pargles Dall'Oglio, Marcelo Porto and Luciano Volcan Agostini
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Artigo | |
Apresentação |
Hardware-Friendly Motion Estimation Algorithms and its Architectures for High Definition Videos
Mario Saldanha, Gabriel Balota, Gustavo Sanchez, Luciano Agostini and Marcelo Porto
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Artigo | |
Apresentação |
Session 7: Digital Design II
Study and development of a simulation tool for optical lithography
Tania Mara Ferla, Guilherme Flach and Ricardo Reis
ASCEnD: A Standard Cell Library for Semi-Custom Asynchronous Design
Matheus Moreira, Ney L. V. Calazans and Carlos Oliveira
Performance and Power Consumption Analysis of Full Adders Designed in 32nm Technology
Fábio G. R. G. Silva, Paulo F. Butzen and Cristina Meinhardt
A Quantum-dot Cellular Automata Parallel Prefix Adder
Kim Escobar and Renato Ribas
Multiple Dynamic Supply Voltage Benchmarks Generator
Marco Terres, Marcelo Johann and Ricardo Reis
Global Routing and Parallelism
Roger Caputo, Diego Tumelero, Marcelo Johann and Ricardo Reis
Tania Mara Ferla, Guilherme Flach and Ricardo Reis
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Artigo | |
Apresentação |
ASCEnD: A Standard Cell Library for Semi-Custom Asynchronous Design
Matheus Moreira, Ney L. V. Calazans and Carlos Oliveira
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Artigo | |
Apresentação |
Performance and Power Consumption Analysis of Full Adders Designed in 32nm Technology
Fábio G. R. G. Silva, Paulo F. Butzen and Cristina Meinhardt
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Artigo | |
Apresentação |
A Quantum-dot Cellular Automata Parallel Prefix Adder
Kim Escobar and Renato Ribas
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Artigo | |
Apresentação |
Multiple Dynamic Supply Voltage Benchmarks Generator
Marco Terres, Marcelo Johann and Ricardo Reis
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Artigo | |
Apresentação |
Global Routing and Parallelism
Roger Caputo, Diego Tumelero, Marcelo Johann and Ricardo Reis
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Artigo | |
Apresentação |
Session 8: Digital Design III
Aging Effects Analysis of Flip-flops
Cícero Nunes, Paulo Butzen, Andre Reis and Renato Ribas
A Tool to Evaluate Stuck-Open Faults in CMOS Logic Gates
Alexandra Lackmann Zimpeck, Cristina Meinhardt and Paulo F. Butzen
Comparison of 90nm and 65nm Logic Synthesis of a SAD Configurable VLSI Architecture
Ismael Seidel, Bruno George Moraes, André Beims Bräscher and Jose Luis Güntzel
Power Optimization of FIR Filters through the Coefficients Reordering using Anedma Heuristic
João Guilherme Nizer Rahmeier, Ângelo Luz, Sidinei Ghissoni and Eduardo A. Costa
Explicit logical effort formulation for minimum circuit active area under delay constraints
Caio Graco P. Alegretti, Vinicius Dal Bem, Renato P. Ribas and André I. Reis
Simultaneous Gate Sizing and Vth Assignment using Lagrangian Relaxation and Delay Sensitivities
Guilherme Flach, Tiago J. Reimann, Gracieli Posser, Marcelo Johann and Ricardo Reis
Delay Model for Static CMOS Gates Considering Single Input Multiple Transistor Switching
Felipe Marranghello, Andre Reis and Renato Ribas
Cícero Nunes, Paulo Butzen, Andre Reis and Renato Ribas
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Artigo | |
Apresentação |
A Tool to Evaluate Stuck-Open Faults in CMOS Logic Gates
Alexandra Lackmann Zimpeck, Cristina Meinhardt and Paulo F. Butzen
|
Artigo | |
Apresentação |
Comparison of 90nm and 65nm Logic Synthesis of a SAD Configurable VLSI Architecture
Ismael Seidel, Bruno George Moraes, André Beims Bräscher and Jose Luis Güntzel
|
Artigo | |
Apresentação |
Power Optimization of FIR Filters through the Coefficients Reordering using Anedma Heuristic
João Guilherme Nizer Rahmeier, Ângelo Luz, Sidinei Ghissoni and Eduardo A. Costa
|
Artigo | |
Apresentação |
Explicit logical effort formulation for minimum circuit active area under delay constraints
Caio Graco P. Alegretti, Vinicius Dal Bem, Renato P. Ribas and André I. Reis
|
Artigo | |
Apresentação |
Simultaneous Gate Sizing and Vth Assignment using Lagrangian Relaxation and Delay Sensitivities
Guilherme Flach, Tiago J. Reimann, Gracieli Posser, Marcelo Johann and Ricardo Reis
|
Artigo | |
Apresentação |
Delay Model for Static CMOS Gates Considering Single Input Multiple Transistor Switching
Felipe Marranghello, Andre Reis and Renato Ribas
|
Artigo | |
Apresentação |
